llvm-16.2023-03-28Z.42d1b27
[ebafcb8
] 2023-03-28T06:59:43Z
[CMake] Respect variables for specifying host tools even without LLVM_USE_HOST_TOOLS set
[8de1b29
] 2023-03-28T06:59:37Z
[llvm-objdump] Fix help message for --print-imm-hex
[1ca4b5c
] 2023-03-28T06:59:31Z
[sanitizer][win] Change cmdline check to allow double backslashs
[973cea7
] 2023-03-28T06:55:27Z
[BOLT] Search section based on relocation symbol
[140c68d
] 2023-03-28T06:55:21Z
[libc++] Avoid ODR violations in __exception_guard
[a18482a
] 2023-03-28T06:55:13Z
[BOLT][AArch64] Replace NOP with adrp in AdrRelaxationPass to preserve relative offsets.
[c2ef325
] 2023-03-28T06:55:06Z
[BOLT][NFC] Remove C-style out of bounds array ref
[4f243f1
] 2023-03-28T06:54:58Z
[test] Improve MC/RISCV/riscv64-64b-pcrel.s
[ee1493c
] 2023-03-28T06:54:58Z
[test] Improve MC/RISCV/riscv64-64b-pcrel.s to demonstrate regression due to D132262
[34194d8
] 2023-03-28T06:54:58Z
[test] Add some interesting cases to MC/RISCV/riscv64-64b-pcrel.s
[1c1ab11
] 2023-03-28T06:54:58Z
[RISCV][MC] Adjust conditions to emit R_RISCV_ADD*/R_RISCV_SUB* pairs
[1f9ea2d
] 2023-03-24T07:44:58Z
[X86] AMD Genoa (znver4) Scheduler model update