[AIE2P] RegBankSelect support for fifo loads

Xilinx · Jan 23, 2025 · 299b4c7 · 299b4c7
1 parent 83a22dd
commit 299b4c7
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Showing 2 changed files with 623 additions and 0 deletions.
diff --git a/llvm/lib/Target/AIE/aie2p/AIE2PRegisterBankInfo.cpp b/llvm/lib/Target/AIE/aie2p/AIE2PRegisterBankInfo.cpp
@@ -400,6 +400,54 @@ static bool isUsedAsFifoRegInIntrinsic(const MachineRegisterInfo &MRI,
       return true;
     break;
   }
+  case Intrinsic::aie2p_fifo_ld_pop_unaligned:
+  case Intrinsic::aie2p_fifo_ld_pop_1d_unaligned: {
+    Register FifoDstReg = MI.getOperand(2).getReg();
+    Register FifoSrcReg = MI.getOperand(6).getReg();
+    if ((FifoRegCandidate == FifoDstReg) || (FifoRegCandidate == FifoSrcReg))
+      return true;
+    break;
+  }
+  case Intrinsic::aie2p_fifo_ld_pop_544_1d_bfp16:
+  case Intrinsic::aie2p_fifo_ld_pop_576_1d_bfp16:
+  case Intrinsic::aie2p_fifo_ld_pop_544_bfp16:
+  case Intrinsic::aie2p_fifo_ld_pop_576_bfp16: {
+    Register FifoDstReg = MI.getOperand(1).getReg();
+    Register FifoSrcReg = MI.getOperand(7).getReg();
+    if ((FifoRegCandidate == FifoDstReg) || (FifoRegCandidate == FifoSrcReg))
+      return true;
+    break;
+  }
+  case Intrinsic::aie2p_fifo_ld_pop_2d_unaligned: {
+    Register FifoDstReg = MI.getOperand(2).getReg();
+    Register FifoSrcReg = MI.getOperand(7).getReg();
+    if ((FifoRegCandidate == FifoDstReg) || (FifoRegCandidate == FifoSrcReg))
+      return true;
+    break;
+  }
+  case Intrinsic::aie2p_fifo_ld_pop_3d_unaligned: {
+    Register FifoDstReg = MI.getOperand(2).getReg();
+    Register FifoSrcReg = MI.getOperand(8).getReg();
+    if ((FifoRegCandidate == FifoDstReg) || (FifoRegCandidate == FifoSrcReg))
+      return true;
+    break;
+  }
+  case Intrinsic::aie2p_fifo_ld_pop_544_2d_bfp16:
+  case Intrinsic::aie2p_fifo_ld_pop_576_2d_bfp16: {
+    Register FifoDstReg = MI.getOperand(1).getReg();
+    Register FifoSrcReg = MI.getOperand(8).getReg();
+    if ((FifoRegCandidate == FifoDstReg) || (FifoRegCandidate == FifoSrcReg))
+      return true;
+    break;
+  }
+  case Intrinsic::aie2p_fifo_ld_pop_544_3d_bfp16:
+  case Intrinsic::aie2p_fifo_ld_pop_576_3d_bfp16: {
+    Register FifoDstReg = MI.getOperand(1).getReg();
+    Register FifoSrcReg = MI.getOperand(9).getReg();
+    if ((FifoRegCandidate == FifoDstReg) || (FifoRegCandidate == FifoSrcReg))
+      return true;
+    break;
+  }
   default:
     return false;
   }
@@ -975,6 +1023,8 @@ AIE2PRegisterBankInfo::getRegBankFromRegClass(const TargetRegisterClass &RC,
   case AIE2P::eSRegClassID:
   case AIE2P::mS2RegClassID:
   case AIE2P::mS3RegClassID:
+  case AIE2P::eERegClassID:
+  case AIE2P::EXPVEC64RegClassID:
     return GPRs;
   case AIE2P::ePRegClassID:
   case AIE2P::eSpecial20RegClassID: