[AIE2P] Legalize G_UNMERGE_VALUES for scalar source operand

Xilinx · Jan 20, 2025 · 74d329a · 74d329a
1 parent f44a3c5
commit 74d329a
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diff --git a/llvm/lib/Target/AIE/aie2p/AIE2PLegalizerInfo.cpp b/llvm/lib/Target/AIE/aie2p/AIE2PLegalizerInfo.cpp
@@ -547,6 +547,20 @@ AIE2PLegalizerInfo::AIE2PLegalizerInfo(const AIE2PSubtarget &ST)
                                   LLT::fixed_vector(SrcTy.getNumElements() / 2,
                                                     SrcTy.getElementType()));
           })
+      .bitcastIf(
+          [=](const LegalityQuery &Query) {
+            const LLT &SrcTy = Query.Types[1];
+
+            // If the source type is already a vector, there is nothing to do.
+            return !SrcTy.isVector();
+          },
+          [=](const LegalityQuery &Query) {
+            const LLT &DstTy = Query.Types[0];
+            const LLT &SrcTy = Query.Types[1];
+            const unsigned NumElems =
+                SrcTy.getSizeInBits() / DstTy.getSizeInBits();
+            return std::make_pair(1, LLT::fixed_vector(NumElems, DstTy));
+          })
       .customIf([=](const LegalityQuery &Query) {
         const LLT &DstTy = Query.Types[0];
         const LLT &SrcTy = Query.Types[1];

diff --git a/llvm/test/CodeGen/AIE/aie2p/GlobalIsel/legalize-unmerge-values.mir b/llvm/test/CodeGen/AIE/aie2p/GlobalIsel/legalize-unmerge-values.mir
@@ -0,0 +1,79 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+#
+# This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+# See https://llvm.org/LICENSE.txt for license information.
+# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+#
+# (c) Copyright 2025 Advanced Micro Devices, Inc. or its affiliates
+# RUN: llc -mtriple aie2p -run-pass=legalizer %s -verify-machineinstrs -o - | FileCheck %s
+
+
+---
+name:           test_scalarSrc_128
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: test_scalarSrc_128
+    ; CHECK: [[DEF:%[0-9]+]]:_(s128) = G_IMPLICIT_DEF
+    ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s64>) = G_BITCAST [[DEF]](s128)
+    ; CHECK-NEXT: [[AIE_PAD_VECTOR_UNDEF:%[0-9]+]]:_(<4 x s64>) = G_AIE_PAD_VECTOR_UNDEF [[BITCAST]](<2 x s64>)
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+    ; CHECK-NEXT: [[AIE_SEXT_EXTRACT_VECTOR_ELT:%[0-9]+]]:_(s64) = G_AIE_SEXT_EXTRACT_VECTOR_ELT [[AIE_PAD_VECTOR_UNDEF]](<4 x s64>), [[C]](s32)
+    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK-NEXT: [[AIE_SEXT_EXTRACT_VECTOR_ELT1:%[0-9]+]]:_(s64) = G_AIE_SEXT_EXTRACT_VECTOR_ELT [[AIE_PAD_VECTOR_UNDEF]](<4 x s64>), [[C1]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $lr, implicit [[AIE_SEXT_EXTRACT_VECTOR_ELT]](s64), implicit [[AIE_SEXT_EXTRACT_VECTOR_ELT1]](s64)
+    %0:_(s128) = G_IMPLICIT_DEF
+    %1:_(s64), %2:_(s64) = G_UNMERGE_VALUES %0:_(s128)
+    PseudoRET implicit $lr, implicit %1, implicit %2
+...
+---
+name:           test_scalarSrc_s256
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: test_scalarSrc_s256
+    ; CHECK: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF
+    ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<4 x s64>) = G_BITCAST [[DEF]](s256)
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+    ; CHECK-NEXT: [[AIE_SEXT_EXTRACT_VECTOR_ELT:%[0-9]+]]:_(s64) = G_AIE_SEXT_EXTRACT_VECTOR_ELT [[BITCAST]](<4 x s64>), [[C]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $lr, implicit [[AIE_SEXT_EXTRACT_VECTOR_ELT]](s64)
+    %0:_(s256) = G_IMPLICIT_DEF
+    %1:_(s64), %2:_(s64), %3:_(s64), %4:_(s64) = G_UNMERGE_VALUES %0:_(s256)
+    PseudoRET implicit $lr, implicit %1
+---
+name:           test_scalarSrc_s512
+body:             |
+  bb.0.entry:
+    %0:_(s512) = G_IMPLICIT_DEF
+    %1:_(s64), %2:_(s64), %3:_(s64), %4:_(s64), %5:_(s64), %6:_(s64), %7:_(s64), %8:_(s64) = G_UNMERGE_VALUES %0:_(s512)
+    PseudoRET implicit $lr, implicit %1
+...
+---
+name:           test_scalarSrc_s1024
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: test_scalarSrc_s1024
+    ; CHECK: [[DEF:%[0-9]+]]:_(s1024) = G_IMPLICIT_DEF
+    ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<16 x s64>) = G_BITCAST [[DEF]](s1024)
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+    ; CHECK-NEXT: [[AIE_SEXT_EXTRACT_VECTOR_ELT:%[0-9]+]]:_(s64) = G_AIE_SEXT_EXTRACT_VECTOR_ELT [[BITCAST]](<16 x s64>), [[C]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $lr, implicit [[AIE_SEXT_EXTRACT_VECTOR_ELT]](s64)
+    %0:_(s1024) = G_IMPLICIT_DEF
+    %1:_(s64), %2:_(s64), %3:_(s64), %4:_(s64), %5:_(s64), %6:_(s64), %7:_(s64), %8:_(s64), %9:_(s64), %10:_(s64), %11:_(s64), %12:_(s64), %13:_(s64), %14:_(s64), %15:_(s64), %16:_(s64) = G_UNMERGE_VALUES %0:_(s1024)
+    PseudoRET implicit $lr, implicit %1
+...
+---
+name:           test_scalarSrc_s2048
+body:             |
+  bb.0.entry:
+    liveins: $dm0
+    ; CHECK-LABEL: name: test_scalarSrc_s2048
+    ; CHECK: liveins: $dm0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s2048) = COPY $dm0
+    ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<32 x s64>) = G_BITCAST [[COPY]](s2048)
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+    ; CHECK-NEXT: [[AIE_SEXT_EXTRACT_VECTOR_ELT:%[0-9]+]]:_(s64) = G_AIE_SEXT_EXTRACT_VECTOR_ELT [[BITCAST]](<32 x s64>), [[C]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $lr, implicit [[AIE_SEXT_EXTRACT_VECTOR_ELT]](s64)
+    %0:_(s2048) = COPY $dm0
+    %1:_(s64), %2:_(s64), %3:_(s64), %4:_(s64), %5:_(s64), %6:_(s64), %7:_(s64), %8:_(s64), %9:_(s64), %10:_(s64), %11:_(s64), %12:_(s64), %13:_(s64), %14:_(s64), %15:_(s64), %16:_(s64), %17:_(s64), %18:_(s64), %19:_(s64), %20:_(s64), %21:_(s64), %22:_(s64), %23:_(s64), %24:_(s64), %25:_(s64), %26:_(s64), %27:_(s64), %28:_(s64), %29:_(s64), %30:_(s64), %31:_(s64), %32:_(s64) = G_UNMERGE_VALUES %0:_(s2048)
+    PseudoRET implicit $lr, implicit %1
+...