[AIE2] Fix itinerary for M slot #216
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krishnamtibrewala
requested review from
abhinay-anubola,
abnikant,
andcarminati,
gbossu,
khallouh,
konstantinschwarz,
martien-de-jong,
SagarMaheshwari99 and
stephenneuendorffer
as code owners
| InstrItinData<II_MOV_DJ, [PrefixCycle<RS_WM_PORT>, SimpleCycle<DJ_WM_PORT>], [1,1]>, | ||
| InstrItinData<II_MOV_DN, [PrefixCycle<RS_WM_PORT>, SimpleCycle<DN_WM_PORT>], [1,1]>, | ||
| InstrItinData<II_MOV_M, [PrefixCycle<RS_WM_PORT>, SimpleCycle<M_WM_PORT>], [1,1]>, | ||
| InstrItinData<II_MOV_P, [PrefixCycle<RS_WM_PORT>, SimpleCycle<P_WM_PORT>], [1,1]>, |
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Is there any use of the {DC,DJ,DN,M,P}_WM_PORT that doesn't also use the RS_WM_PORT?
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Also what I'm wondering, do we need all those itineraries then?
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Yes we have use of {DC,DJ,DN,M,P}_WM_PORT from few instructions from slot A like LDA*, MOVA that does not use RS_WM_PORT
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Right, so it is okay to have
LDA p0
NOP
NOP
NOP
NOP
NOP
MOV m0
but not
VEXTRACT p0
MOV m0
because they both need to book RS_WM_PORT at the same time.
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| [2,1,1,/*crVaddSign*/1], [NoBypass,MOV_Bypass,NoBypass]>, | ||
| InstrItinData<II_VEXTRACT_P, [EmptyCycles<1>, SimpleCycle<P_WM_PORT>], | ||
| InstrItinData<II_VEXTRACT_P, [EmptyCycles<1>, PrefixCycle<RS_WM_PORT>, SimpleCycle<P_WM_PORT>], |
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I'm surprised such a change isn't requiring test updates. Can you add some to show that MOV and VEXTRACT can conflict, even though they seemingly write to different register files?
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I did add few new tests, in r_wm.mir
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