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[AIE NFC] Postpipeliner cleanups and refactorings #253

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[AIE NFC] Postpipeliner cleanups and refactorings #253

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8baa1cf
[AIE] Pack NodeInfo in a class with additional information
Dec 10, 2024
03951f0
[AIE] Push Earliest with local resource contention
Dec 12, 2024
3cd1db1
[AIE] Specify maxii relative to MinII
Dec 12, 2024
37d1a95
[AIE] Compute MinEarliest, MaxEarliest and MinLatest
Dec 12, 2024
505d73f
[AIE] Don't print edges to ExitSU
Dec 12, 2024
11bc08e
[AIE] Maintain II in the pipeliner strategy
Dec 12, 2024
6636a0a
[AIE] Add conv2d-bf16 test with feasible register allocation
Dec 12, 2024
7f4c316
[AIE] Bail out if RecMII not met.
Dec 12, 2024
95dbddf
[AIE] Reject NStages=1 pipelines
Jan 14, 2025
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14 changes: 11 additions & 3 deletions llvm/lib/Target/AIE/AIEPostPipeliner.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -342,7 +342,10 @@ bool PostPipeliner::computeLoopCarriedParameters() {
N.StaticLatest = N.Latest;
}
Info.compute();
return true;

// If no node can be scheduled in cycle 0, we must have a circuit that
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Nit: If no node can be scheduled in cycle 0 after accounting for LCDs, ...

// is longer than II
return Info.MinEarliest == 0;
}

int PostPipeliner::computeMinScheduleLength() const {
Expand Down Expand Up @@ -753,7 +756,7 @@ bool PostPipeliner::schedule(ScheduleDAGMI &TheDAG, int InitiationInterval) {
assert(NTotalInstrs % NInstr == 0);
NCopies = NTotalInstrs / NInstr;
if (NCopies == 1) {
LLVM_DEBUG(dbgs() << "PostPipeliner: Not feasible\n");
LLVM_DEBUG(dbgs() << "PostPipeliner: Not feasible - Too few stages\n");
return false;
}
II = InitiationInterval;
Expand All @@ -770,7 +773,12 @@ bool PostPipeliner::schedule(ScheduleDAGMI &TheDAG, int InitiationInterval) {
I++) { dbgs() << I << " " << *DAG->SUnits[I].getInstr(); });
LLVM_DEBUG(dumpGraph(Info, DAG));

computeLoopCarriedParameters();
bool Feasible = computeLoopCarriedParameters();
if (!Feasible) {
LLVM_DEBUG(dbgs() << "PostPipeliner: Not feasible - RecMII\n");
return false;
}

LLVM_DEBUG(dumpIntervals(Info, computeMinScheduleLength()));
if (!tryHeuristics()) {
LLVM_DEBUG(dbgs() << "PostPipeliner: No schedule found\n");
Expand Down