[AIE2P] Fix combine G_SHUFFLE_VEC to G_AIE_VSEL for <64xs8> #338
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katerynamuts
requested review from
abhinay-anubola,
abnikant,
andcarminati,
F-Stuckmann,
gbossu,
khallouh,
konstantinschwarz,
martien-de-jong,
niwinanto,
SagarMaheshwari99 and
stephenneuendorffer
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khallouh
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Feb 6, 2025
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<64 x s8>) = COPY $x2 | ||
| ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<64 x s8>) = G_IMPLICIT_DEF | ||
| ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 | ||
| ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s32>) = G_BITCAST [[C]](s64) |
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Can we avoid this bitcast by changing the selection pattern to use i64 for the mask instead of v2i32 now that i64 has been made legal for eL register class?
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Can we make v64i1 legal for eL as well?
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@khallouh good point! Done
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<64 x s8>) = COPY $x2 | ||
| ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<64 x s8>) = G_IMPLICIT_DEF | ||
| ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 | ||
| ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s32>) = G_BITCAST [[C]](s64) |
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We can't build it as a 2 x s32 literal? (I would hope 64 x s1, but let's do small steps. )
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The PR fixes the combine of
G_SHUFFLE_VECtoG_AIE_VSELfor<64xs8>type because in this case during instruction selectionG_AIE_VSELis selected intoVSEL_8with a2xs32mask.