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Add community support for Cyber Aib RK3588
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# Rockchip RK3588 octa core 8/16GB RAM SoC 64/128GB eMMC NVMe 1x USB3 1x USB-C 2x 2.5GbE 2x HDMI | ||
BOARD_NAME="Cyber Aib RK3588" | ||
BOARDFAMILY="rockchip-rk3588" | ||
BOARD_MAINTAINER="" | ||
BOOTCONFIG="rk3588-cyber-aib_defconfig" | ||
KERNEL_TARGET="vendor" | ||
FULL_DESKTOP="yes" | ||
BOOT_LOGO="desktop" | ||
BOOT_FDT_FILE="rockchip/rk3588-cyber-aib.dtb" | ||
BOOT_SCENARIO="spl-blobs" | ||
BOOT_SOC="rk3588" | ||
IMAGE_PARTITION_TABLE="gpt" | ||
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function post_family_tweaks__cyberaib_naming_audios() { | ||
display_alert "$BOARD" "Renaming cyber-aib audios" "info" | ||
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mkdir -p $SDCARD/etc/udev/rules.d/ | ||
echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-hdmi0-sound", ENV{SOUND_DESCRIPTION}="HDMI0 Audio"' > $SDCARD/etc/udev/rules.d/90-naming-audios.rules | ||
echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-hdmiin-sound", ENV{SOUND_DESCRIPTION}="HDMI-In Audio"' >> $SDCARD/etc/udev/rules.d/90-naming-audios.rules | ||
echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-dp0-sound", ENV{SOUND_DESCRIPTION}="DP0 Audio"' >> $SDCARD/etc/udev/rules.d/90-naming-audios.rules | ||
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return 0 | ||
} |
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patch/u-boot/legacy/u-boot-radxa-rk35xx/defconfig/rk3588-cyber-aib_defconfig
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CONFIG_ARM=y | ||
CONFIG_ARM_CPU_SUSPEND=y | ||
CONFIG_ARCH_ROCKCHIP=y | ||
CONFIG_SPL_GPIO_SUPPORT=y | ||
CONFIG_SPL_LIBCOMMON_SUPPORT=y | ||
CONFIG_SPL_LIBGENERIC_SUPPORT=y | ||
CONFIG_SYS_MALLOC_F_LEN=0x80000 | ||
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" | ||
CONFIG_ROCKCHIP_RK3588=y | ||
CONFIG_ROCKCHIP_FIT_IMAGE=y | ||
CONFIG_ROCKCHIP_HWID_DTB=y | ||
CONFIG_ROCKCHIP_VENDOR_PARTITION=y | ||
CONFIG_USING_KERNEL_DTB_V2=y | ||
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y | ||
CONFIG_ROCKCHIP_NEW_IDB=y | ||
CONFIG_LOADER_INI="RK3588MINIALL.ini" | ||
CONFIG_TRUST_INI="RK3588TRUST.ini" | ||
CONFIG_SPL_SERIAL_SUPPORT=y | ||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | ||
CONFIG_TARGET_EVB_RK3588=y | ||
CONFIG_SPL_LIBDISK_SUPPORT=y | ||
CONFIG_SPL_SPI_FLASH_SUPPORT=y | ||
CONFIG_SPL_SPI_SUPPORT=y | ||
CONFIG_DEFAULT_DEVICE_TREE="rk3588-cyber-aib" | ||
CONFIG_DEBUG_UART=y | ||
CONFIG_LOCALVERSION="-linyufeng" | ||
# CONFIG_LOCALVERSION_AUTO is not set | ||
CONFIG_FIT=y | ||
CONFIG_FIT_IMAGE_POST_PROCESS=y | ||
CONFIG_FIT_HW_CRYPTO=y | ||
CONFIG_SPL_LOAD_FIT=y | ||
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y | ||
CONFIG_SPL_FIT_HW_CRYPTO=y | ||
# CONFIG_SPL_SYS_DCACHE_OFF is not set | ||
CONFIG_BOOTDELAY=0 | ||
CONFIG_SYS_CONSOLE_INFO_QUIET=y | ||
# CONFIG_DISPLAY_CPUINFO is not set | ||
CONFIG_ANDROID_BOOTLOADER=y | ||
CONFIG_ANDROID_AVB=y | ||
CONFIG_ANDROID_BOOT_IMAGE_HASH=y | ||
CONFIG_SPL_BOARD_INIT=y | ||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set | ||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set | ||
CONFIG_SPL_SEPARATE_BSS=y | ||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y | ||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 | ||
CONFIG_SPL_MMC_WRITE=y | ||
CONFIG_SPL_MTD_SUPPORT=y | ||
CONFIG_SPL_ATF=y | ||
CONFIG_FASTBOOT_BUF_ADDR=0xc00800 | ||
CONFIG_FASTBOOT_BUF_SIZE=0x04000000 | ||
CONFIG_FASTBOOT_FLASH=y | ||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | ||
CONFIG_CMD_BOOTZ=y | ||
CONFIG_CMD_DTIMG=y | ||
# CONFIG_CMD_ELF is not set | ||
# CONFIG_CMD_IMI is not set | ||
# CONFIG_CMD_IMLS is not set | ||
# CONFIG_CMD_XIMG is not set | ||
# CONFIG_CMD_LZMADEC is not set | ||
# CONFIG_CMD_UNZIP is not set | ||
# CONFIG_CMD_FLASH is not set | ||
# CONFIG_CMD_FPGA is not set | ||
CONFIG_CMD_GPT=y | ||
# CONFIG_CMD_LOADB is not set | ||
# CONFIG_CMD_LOADS is not set | ||
CONFIG_CMD_BOOT_ANDROID=y | ||
CONFIG_CMD_MMC=y | ||
CONFIG_CMD_PCI=y | ||
CONFIG_CMD_USB=y | ||
CONFIG_CMD_USB_MASS_STORAGE=y | ||
# CONFIG_CMD_ITEST is not set | ||
# CONFIG_CMD_SETEXPR is not set | ||
CONFIG_CMD_TFTPPUT=y | ||
CONFIG_CMD_TFTP_BOOTM=y | ||
CONFIG_CMD_TFTP_FLASH=y | ||
# CONFIG_CMD_MISC is not set | ||
CONFIG_CMD_MTD_BLK=y | ||
# CONFIG_SPL_DOS_PARTITION is not set | ||
# CONFIG_ISO_PARTITION is not set | ||
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 | ||
CONFIG_SPL_OF_CONTROL=y | ||
CONFIG_SPL_DTB_MINIMUM=y | ||
CONFIG_OF_LIVE=y | ||
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" | ||
# CONFIG_NET_TFTP_VARS is not set | ||
CONFIG_REGMAP=y | ||
CONFIG_SPL_REGMAP=y | ||
CONFIG_SYSCON=y | ||
CONFIG_SPL_SYSCON=y | ||
# CONFIG_SARADC_ROCKCHIP is not set | ||
CONFIG_SARADC_ROCKCHIP_V2=y | ||
CONFIG_CLK=y | ||
CONFIG_SPL_CLK=y | ||
CONFIG_CLK_SCMI=y | ||
CONFIG_SPL_CLK_SCMI=y | ||
CONFIG_DM_CRYPTO=y | ||
CONFIG_SPL_DM_CRYPTO=y | ||
CONFIG_ROCKCHIP_CRYPTO_V2=y | ||
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y | ||
CONFIG_DM_RNG=y | ||
CONFIG_RNG_ROCKCHIP=y | ||
CONFIG_SCMI_FIRMWARE=y | ||
CONFIG_SPL_SCMI_FIRMWARE=y | ||
CONFIG_ROCKCHIP_GPIO=y | ||
CONFIG_ROCKCHIP_GPIO_V2=y | ||
CONFIG_SYS_I2C_ROCKCHIP=y | ||
CONFIG_DM_KEY=y | ||
CONFIG_ADC_KEY=y | ||
CONFIG_MISC=y | ||
CONFIG_SPL_MISC=y | ||
CONFIG_MISC_DECOMPRESS=y | ||
CONFIG_SPL_MISC_DECOMPRESS=y | ||
CONFIG_ROCKCHIP_OTP=y | ||
CONFIG_ROCKCHIP_HW_DECOMPRESS=y | ||
CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y | ||
CONFIG_SPL_ROCKCHIP_SECURE_OTP=y | ||
CONFIG_MMC_DW=y | ||
CONFIG_MMC_DW_ROCKCHIP=y | ||
CONFIG_MMC_SDHCI=y | ||
CONFIG_MMC_SDHCI_SDMA=y | ||
CONFIG_MMC_SDHCI_ROCKCHIP=y | ||
CONFIG_MTD=y | ||
CONFIG_MTD_BLK=y | ||
CONFIG_MTD_DEVICE=y | ||
CONFIG_NAND=y | ||
CONFIG_MTD_SPI_NAND=y | ||
CONFIG_SPI_FLASH=y | ||
CONFIG_SF_DEFAULT_SPEED=80000000 | ||
CONFIG_SPI_FLASH_EON=y | ||
CONFIG_SPI_FLASH_GIGADEVICE=y | ||
CONFIG_SPI_FLASH_MACRONIX=y | ||
CONFIG_SPI_FLASH_SST=y | ||
CONFIG_SPI_FLASH_WINBOND=y | ||
CONFIG_SPI_FLASH_XMC=y | ||
CONFIG_SPI_FLASH_XTX=y | ||
CONFIG_SPI_FLASH_MTD=y | ||
CONFIG_DM_ETH=y | ||
CONFIG_DM_ETH_PHY=y | ||
CONFIG_DWC_ETH_QOS=y | ||
CONFIG_GMAC_ROCKCHIP=y | ||
CONFIG_NVME=y | ||
CONFIG_PCI=y | ||
CONFIG_DM_PCI=y | ||
CONFIG_DM_PCI_COMPAT=y | ||
CONFIG_PCIE_DW_ROCKCHIP=y | ||
CONFIG_PHY_ROCKCHIP_INNO_USB2=y | ||
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y | ||
CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y | ||
CONFIG_PINCTRL=y | ||
CONFIG_SPL_PINCTRL=y | ||
CONFIG_DM_PMIC=y | ||
CONFIG_PMIC_SPI_RK8XX=y | ||
CONFIG_REGULATOR_PWM=y | ||
CONFIG_DM_REGULATOR_FIXED=y | ||
CONFIG_DM_REGULATOR_GPIO=y | ||
CONFIG_REGULATOR_RK860X=y | ||
CONFIG_PWM_ROCKCHIP=y | ||
CONFIG_RAM=y | ||
CONFIG_SPL_RAM=y | ||
CONFIG_TPL_RAM=y | ||
CONFIG_ROCKCHIP_SDRAM_COMMON=y | ||
CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0 | ||
CONFIG_DM_RESET=y | ||
CONFIG_SPL_DM_RESET=y | ||
CONFIG_SPL_RESET_ROCKCHIP=y | ||
CONFIG_BAUDRATE=1500000 | ||
CONFIG_DEBUG_UART_BASE=0xFEB50000 | ||
CONFIG_DEBUG_UART_CLOCK=24000000 | ||
CONFIG_DEBUG_UART_SHIFT=2 | ||
CONFIG_ROCKCHIP_SPI=y | ||
CONFIG_ROCKCHIP_SFC=y | ||
CONFIG_SYSRESET=y | ||
CONFIG_USB=y | ||
CONFIG_USB_XHCI_HCD=y | ||
CONFIG_USB_XHCI_DWC3=y | ||
CONFIG_USB_XHCI_PCI=y | ||
CONFIG_USB_EHCI_HCD=y | ||
CONFIG_USB_EHCI_GENERIC=y | ||
CONFIG_USB_OHCI_HCD=y | ||
CONFIG_USB_OHCI_GENERIC=y | ||
CONFIG_USB_DWC3=y | ||
CONFIG_USB_DWC3_GADGET=y | ||
CONFIG_USB_DWC3_GENERIC=y | ||
CONFIG_USB_STORAGE=y | ||
CONFIG_USB_GADGET=y | ||
CONFIG_USB_GADGET_MANUFACTURER="Rockchip" | ||
CONFIG_USB_GADGET_VENDOR_NUM=0x2207 | ||
CONFIG_USB_GADGET_PRODUCT_NUM=0x350a | ||
CONFIG_USB_GADGET_DOWNLOAD=y | ||
CONFIG_DM_VIDEO=y | ||
CONFIG_DISPLAY=y | ||
CONFIG_DRM_ROCKCHIP=y | ||
CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y | ||
CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y | ||
CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y | ||
CONFIG_USE_TINY_PRINTF=y | ||
CONFIG_LIB_RAND=y | ||
CONFIG_SPL_TINY_MEMSET=y | ||
CONFIG_RSA=y | ||
CONFIG_SPL_RSA=y | ||
CONFIG_RSA_N_SIZE=0x200 | ||
CONFIG_RSA_E_SIZE=0x10 | ||
CONFIG_RSA_C_SIZE=0x20 | ||
CONFIG_LZ4=y | ||
CONFIG_ERRNO_STR=y | ||
# CONFIG_EFI_LOADER is not set | ||
CONFIG_AVB_LIBAVB=y | ||
CONFIG_AVB_LIBAVB_AB=y | ||
CONFIG_AVB_LIBAVB_ATX=y | ||
CONFIG_AVB_LIBAVB_USER=y | ||
CONFIG_RK_AVB_LIBAVB_USER=y | ||
CONFIG_OPTEE_CLIENT=y | ||
CONFIG_OPTEE_V2=y |
160 changes: 160 additions & 0 deletions
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patch/u-boot/legacy/u-boot-radxa-rk35xx/dt/rk3588-cyber-aib.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
/* | ||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd. | ||
* Copyright (c) 2024 Cyber RD Group | ||
*/ | ||
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/dts-v1/; | ||
#include "rk3588.dtsi" | ||
#include "rk3588-u-boot.dtsi" | ||
#include <dt-bindings/input/input.h> | ||
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/ { | ||
model = "Cyber 3588 AIB"; | ||
compatible = "cyber,cyber3588-aib", "rockchip,rk3588"; | ||
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vcc12v_dcin: vcc12v-dcin { | ||
u-boot,dm-pre-reloc; | ||
compatible = "regulator-fixed"; | ||
regulator-name = "vcc12v_dcin"; | ||
regulator-always-on; | ||
regulator-boot-on; | ||
regulator-min-microvolt = <12000000>; | ||
regulator-max-microvolt = <12000000>; | ||
}; | ||
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vcc5v0_sys: vcc5v0-sys { | ||
u-boot,dm-pre-reloc; | ||
compatible = "regulator-fixed"; | ||
regulator-name = "vcc5v0_sys"; | ||
regulator-always-on; | ||
regulator-boot-on; | ||
regulator-min-microvolt = <5000000>; | ||
regulator-max-microvolt = <5000000>; | ||
vin-supply = <&vcc12v_dcin>; | ||
}; | ||
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pcie_power_en: pcie-power-en-regulator { | ||
u-boot,dm-pre-reloc; | ||
compatible = "regulator-fixed"; | ||
regulator-name = "pcie_power_en"; | ||
enable-active-high; | ||
gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; | ||
pinctrl-0 = <&pcie_power_h>; | ||
pinctrl-names = "default"; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
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pcie_preset_low: pcie-preset-low-regulator { | ||
u-boot,dm-pre-reloc; | ||
compatible = "regulator-fixed"; | ||
regulator-name = "pcie_preset_low"; | ||
enable-active-low; | ||
gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>; | ||
pinctrl-0 = <&pcie_preset_l>; | ||
pinctrl-names = "default"; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
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pcie_wifi_enable: pcie-wifi-enable-regulator { | ||
u-boot,dm-pre-reloc; | ||
compatible = "regulator-fixed"; | ||
regulator-name = "pcie_wifi_enable"; | ||
enable-active-low; | ||
gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; | ||
pinctrl-0 = <&pcie_wifi_h>; | ||
pinctrl-names = "default"; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
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wwan_5g_power_en: wwan-5g-power-en { | ||
u-boot,dm-pre-reloc; | ||
compatible = "regulator-fixed"; | ||
regulator-name = "wwan_5g_power_en"; | ||
enable-active-high; | ||
gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; | ||
pinctrl-0 = <&wwan_5g_power_h>; | ||
pinctrl-names = "default"; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
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wwan_disable: wwan-disable-regulator { | ||
u-boot,dm-pre-reloc; | ||
compatible = "regulator-fixed"; | ||
regulator-name = "wwan_disable"; | ||
enable-active-high; | ||
gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; | ||
pinctrl-0 = <&wwan_disable_h>; | ||
pinctrl-names = "default"; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
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wwan_power_off: wwan-power-off-regulator { | ||
u-boot,dm-pre-reloc; | ||
compatible = "regulator-fixed"; | ||
regulator-name = "wwan_power_off"; | ||
enable-active-high; | ||
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; | ||
pinctrl-0 = <&wwan_power_off_h>; | ||
pinctrl-names = "default"; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
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gmac1_power: gmac1-power { | ||
u-boot,dm-pre-reloc; | ||
compatible = "regulator-fixed"; | ||
regulator-name = "gmac1_power"; | ||
enable-active-high; | ||
gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; | ||
pinctrl-0 = <&gmac1_rgmii_pwr_en>; | ||
pinctrl-names = "default"; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
}; | ||
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&pinctrl { | ||
pcie { | ||
pcie_power_h: pcie-power-h { | ||
u-boot,dm-pre-reloc; | ||
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; | ||
}; | ||
pcie_preset_l: pcie-preset-l { | ||
u-boot,dm-pre-reloc; | ||
rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; | ||
}; | ||
pcie_wifi_h: pcie-wifi-h { | ||
u-boot,dm-pre-reloc; | ||
rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; | ||
}; | ||
}; | ||
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wwan-pwr { | ||
wwan_5g_power_h: wwan-5g-power-h { | ||
u-boot,dm-pre-reloc; | ||
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; | ||
}; | ||
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wwan_disable_h: wwan-disable-h { | ||
u-boot,dm-pre-reloc; | ||
rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; | ||
}; | ||
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wwan_power_off_h: wwan-power-off-h { | ||
u-boot,dm-pre-reloc; | ||
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; | ||
}; | ||
}; | ||
gmac1_rgmii { | ||
gmac1_rgmii_pwr_en: gmac1-rgmii-pwr-en { | ||
u-boot,dm-pre-reloc; | ||
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; | ||
}; | ||
}; | ||
}; |