Fix signedness handling in comparison instructions

angr · Apr 29, 2024 · ef3ec46 · ef3ec46
1 parent ed96240
commit ef3ec46
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Showing 2 changed files with 4 additions and 17 deletions.
diff --git a/angr_platforms/risc_v/instrs_riscv/i_instr.py b/angr_platforms/risc_v/instrs_riscv/i_instr.py
@@ -94,10 +94,7 @@ class Instruction_SLTI(I_Instruction):
 
     # TODO: ISA manual mentions sign extension, check if properly implemented
     def compute_result(self, src1, imm):
-        src1.is_signed = True
-        imm.is_signed = True
-        val = 1 if src1.signed < imm.signed else 0
-        return self.constant(val, Type.int_32)
+        return (src1.signed < imm.signed).ite(1, 0)
 
 
 class Instruction_SLTIU(I_Instruction):
@@ -106,10 +103,7 @@ class Instruction_SLTIU(I_Instruction):
     name = 'SLTIU'
 
     def compute_result(self, src1, imm):
-        src1.is_signed = False
-        imm.is_signed = False
-        val = 1 if src1 < imm else 0
-        return self.constant(val, Type.int_32)
+        return (src1 < imm).ite(1, 0)
 
 class Instruction_LB(I_Instruction):
     func3='000'

diff --git a/angr_platforms/risc_v/instrs_riscv/r_instr.py b/angr_platforms/risc_v/instrs_riscv/r_instr.py
@@ -95,11 +95,7 @@ class Instruction_SLT(R_Instruction):
     name='SLT'
 
     def compute_result(self, src1, src2):
-        src1.is_signed = True
-        src2.is_signed = True
-        val = 1 if src1 < src2 else 0
-        return self.constant(val, Type.int_32)
-
+        return (src1.signed < src2.signed).ite(1, 0)
 
 class Instruction_SLTU(R_Instruction):
     func3 = '011'
@@ -108,10 +104,7 @@ class Instruction_SLTU(R_Instruction):
     name = 'SLTU'
 
     def compute_result(self, src1, src2):
-        src1.is_signed = False
-        src1.is_signed = False
-        val = 1 if src1 < src2 else 0
-        return self.constant(val, Type.int_32)
+        return (src1 < src2).ite(1, 0)
 
 
 class Instruction_MUL(R_Instruction):