Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[SOL] Cleanup - remove isSolana flag #113

Merged
merged 1 commit into from
Nov 20, 2024
Merged

[SOL] Cleanup - remove isSolana flag #113

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
5 changes: 1 addition & 4 deletions llvm/lib/Target/SBF/MCTargetDesc/SBFAsmBackend.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -27,8 +27,6 @@ class SBFAsmBackend : public MCAsmBackend {
SBFAsmBackend(endianness Endian, const MCSubtargetInfo &STI)
: MCAsmBackend(Endian),
isSBFv2(STI.getCPU() == "sbfv2"),
isSolana(STI.hasFeature(SBF::FeatureSolana) ||
STI.getTargetTriple().getArch() == Triple::sbf),
relocAbs64(STI.hasFeature(SBF::FeatureRelocAbs64)) {}
~SBFAsmBackend() override = default;

Expand All @@ -53,7 +51,6 @@ class SBFAsmBackend : public MCAsmBackend {
const MCSubtargetInfo *STI) const override;
private:
bool isSBFv2;
bool isSolana;
bool relocAbs64;
};

Expand Down Expand Up @@ -110,7 +107,7 @@ void SBFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,

std::unique_ptr<MCObjectTargetWriter>
SBFAsmBackend::createObjectTargetWriter() const {
return createSBFELFObjectWriter(0, isSolana, relocAbs64, isSBFv2);
return createSBFELFObjectWriter(0, relocAbs64, isSBFv2);
}

MCAsmBackend *llvm::createSBFAsmBackend(const Target &T,
Expand Down
17 changes: 8 additions & 9 deletions llvm/lib/Target/SBF/MCTargetDesc/SBFELFObjectWriter.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ namespace {

class SBFELFObjectWriter : public MCELFObjectTargetWriter {
public:
SBFELFObjectWriter(uint8_t OSABI, bool isSolana, bool relocAbs64, bool isSBFv2);
SBFELFObjectWriter(uint8_t OSABI, bool relocAbs64, bool isSBFv2);
~SBFELFObjectWriter() override = default;

protected:
Expand All @@ -32,7 +32,6 @@ class SBFELFObjectWriter : public MCELFObjectTargetWriter {
bool needsRelocateWithSymbol(const MCValue &Val, const MCSymbol &Sym,
unsigned Type) const override;
private:
bool isSolana;
bool relocAbs64;
};

Expand All @@ -45,15 +44,15 @@ class SBFELFObjectWriter : public MCELFObjectTargetWriter {
bool SBFELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
const MCSymbol &Sym,
unsigned Type) const {
return isSolana;
return true;
}

SBFELFObjectWriter::SBFELFObjectWriter(uint8_t OSABI, bool isSolana,
SBFELFObjectWriter::SBFELFObjectWriter(uint8_t OSABI,
bool relocAbs64, bool isSBFv2)
: MCELFObjectTargetWriter(/*Is64Bit*/ true, OSABI,
isSBFv2 ? ELF::EM_SBF : ELF::EM_BPF,
/*HasRelocationAddend*/ false),
isSolana(isSolana), relocAbs64(relocAbs64) {}
relocAbs64(relocAbs64) {}

unsigned SBFELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
const MCFixup &Fixup,
Expand All @@ -73,7 +72,7 @@ unsigned SBFELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
Ctx.reportError(Fixup.getLoc(), "2-byte relocations not supported");
return ELF::R_SBF_NONE;
case FK_Data_8:
return (isSolana && !relocAbs64) ? ELF::R_SBF_64_64 : ELF::R_SBF_64_ABS64;
return relocAbs64 ? ELF::R_SBF_64_ABS64 : ELF::R_SBF_64_64;
case FK_Data_4:
if (const MCSymbolRefExpr *A = Target.getSymA()) {
const MCSymbol &Sym = A->getSymbol();
Expand Down Expand Up @@ -106,11 +105,11 @@ unsigned SBFELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
return ELF::R_SBF_64_ABS32;
}
}
return isSolana ? ELF::R_SBF_64_32 : ELF::R_SBF_64_ABS32;
return ELF::R_SBF_64_32;
}
}

std::unique_ptr<MCObjectTargetWriter>
llvm::createSBFELFObjectWriter(uint8_t OSABI, bool isSolana, bool useRelocAbs64, bool isSBFv2) {
return std::make_unique<SBFELFObjectWriter>(OSABI, isSolana, useRelocAbs64, isSBFv2);
llvm::createSBFELFObjectWriter(uint8_t OSABI, bool useRelocAbs64, bool isSBFv2) {
return std::make_unique<SBFELFObjectWriter>(OSABI, useRelocAbs64, isSBFv2);
}
2 changes: 1 addition & 1 deletion llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ MCAsmBackend *createSBFbeAsmBackend(const Target &T, const MCSubtargetInfo &STI,
const MCTargetOptions &Options);

std::unique_ptr<MCObjectTargetWriter>
createSBFELFObjectWriter(uint8_t OSABI, bool isSolana, bool useRelocAbs64, bool isSBFv2);
createSBFELFObjectWriter(uint8_t OSABI, bool useRelocAbs64, bool isSBFv2);
} // namespace llvm

// Defines symbolic names for SBF registers. This defines a mapping from
Expand Down
17 changes: 1 addition & 16 deletions llvm/lib/Target/SBF/SBFISelDAGToDAG.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -191,22 +191,7 @@ void SBFDAGToDAGISel::Select(SDNode *Node) {
switch (Opcode) {
default:
break;

case ISD::SDIV: {
if (!Subtarget->isSolana()) {
DebugLoc Empty;
const DebugLoc &DL = Node->getDebugLoc();
if (DL != Empty)
errs() << "Error at line " << DL.getLine() << ": ";
else
errs() << "Error: ";
errs() << "Unsupport signed division for DAG: ";
Node->print(errs(), CurDAG);
errs() << "\nPlease convert to unsigned div/mod.\n";
}
break;
}


case ISD::FrameIndex: {
int FI = cast<FrameIndexSDNode>(Node)->getIndex();
EVT VT = Node->getValueType(0);
Expand Down
Loading
Loading