[SOL] Create explicit sign extension instruction #114
Merged
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
As described in solana-foundation/solana-improvement-documents#174,
mov32 reg, reg
will now serve for sign extension.The changes in this PR are the following:
mov64
for copying 32-bit registers.mov32 reg, reg
for sign extension.mov64 reg, reg
for zero extension. I'm assuming I'll always keep the high bits clear in 32-bit sub-registers.and32 reg, -1
for truncation.I haven't done yet an integration test in the VM, because jump instructions do not work with ALU32. I'll fix that in a following PR and work on the necessary tests.