Update expected IRs in tests

anza-xyz · Oct 19, 2023 · 8938ad5 · 8938ad5
1 parent 7c80f1b
commit 8938ad5
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Showing 34 changed files with 161 additions and 161 deletions.
diff --git a/...uage/tools/move-mv-llvm-compiler/tests/cli-tests/basic-coin-build/0x1__signer.ll.expected b/...uage/tools/move-mv-llvm-compiler/tests/cli-tests/basic-coin-build/0x1__signer.ll.expected
@@ -5,7 +5,7 @@ target triple = "sbf-solana-solana"
 
 declare i32 @memcmp(ptr, ptr, i64)
 
-define [32 x i8] @signer__address_of(ptr nonnull readonly %0) {
+define [32 x i8] @"0000000000000001_signer_address_of_HobbRqPY4HqJJ6"(ptr nonnull readonly %0) {
 entry:
   %local_0 = alloca ptr, align 8
   %local_1 = alloca ptr, align 8

diff --git a/...ge/tools/move-mv-llvm-compiler/tests/move-ir-tests/abort-build/modules/0_Test.expected.ll b/...ge/tools/move-mv-llvm-compiler/tests/move-ir-tests/abort-build/modules/0_Test.expected.ll
@@ -5,7 +5,7 @@ target triple = "sbf-solana-solana"
 
 declare i32 @memcmp(ptr, ptr, i64)
 
-define private void @Test__test() {
+define private void @"0000000000000100_Test_test_FfymrXLxVKvhRk"() {
 entry:
   %local_0 = alloca i64, align 8
   store i64 10, ptr %local_0, align 8

diff --git a/...s/move-mv-llvm-compiler/tests/move-ir-tests/acct-address01-build/modules/0_M3.expected.ll b/...s/move-mv-llvm-compiler/tests/move-ir-tests/acct-address01-build/modules/0_M3.expected.ll
@@ -7,7 +7,7 @@ target triple = "sbf-solana-solana"
 
 declare i32 @memcmp(ptr, ptr, i64)
 
-define i1 @M3__eq_address([32 x i8] %0, [32 x i8] %1) {
+define i1 @"0000000000000100_M3_eq_address_RDPBXNLr9nyQX8"([32 x i8] %0, [32 x i8] %1) {
 entry:
   %local_0 = alloca [32 x i8], align 1
   %local_1 = alloca [32 x i8], align 1
@@ -23,7 +23,7 @@ entry:
   ret i1 %retval
 }
 
-define [32 x i8] @M3__fixed_address() {
+define [32 x i8] @"0000000000000100_M3_fixed_address_AXsxXXZpHkUKQ3"() {
 entry:
   %local_0 = alloca [32 x i8], align 1
   %0 = load [32 x i8], ptr @acct.addr, align 1
@@ -32,7 +32,7 @@ entry:
   ret [32 x i8] %retval
 }
 
-define i1 @M3__ne_address([32 x i8] %0, [32 x i8] %1) {
+define i1 @"0000000000000100_M3_ne_address_7hMDYRZvi8hjUg"([32 x i8] %0, [32 x i8] %1) {
 entry:
   %local_0 = alloca [32 x i8], align 1
   %local_1 = alloca [32 x i8], align 1
@@ -48,7 +48,7 @@ entry:
   ret i1 %retval
 }
 
-define ptr @M3__ret_address_ref(ptr nonnull readonly %0) {
+define ptr @"0000000000000100_M3_ret_address_ref_mH7xfp9W2TDBYv"(ptr nonnull readonly %0) {
 entry:
   %local_0 = alloca ptr, align 8
   %local_1 = alloca ptr, align 8
@@ -59,7 +59,7 @@ entry:
   ret ptr %retval
 }
 
-define [32 x i8] @M3__use_address_ref(ptr nonnull readonly %0) {
+define [32 x i8] @"0000000000000100_M3_use_address_ref_9jcTfHHsGoQPVk"(ptr nonnull readonly %0) {
 entry:
   %local_0 = alloca ptr, align 8
   %local_1 = alloca ptr, align 8
@@ -74,7 +74,7 @@ entry:
   ret [32 x i8] %retval
 }
 
-define [32 x i8] @M3__use_address_val([32 x i8] %0) {
+define [32 x i8] @"0000000000000100_M3_use_address_val_EytLbxU1j6cfLn"([32 x i8] %0) {
 entry:
   %local_0 = alloca [32 x i8], align 1
   %local_1 = alloca [32 x i8], align 1

diff --git a/...e/tools/move-mv-llvm-compiler/tests/move-ir-tests/assert-build/modules/0_Test.expected.ll b/...e/tools/move-mv-llvm-compiler/tests/move-ir-tests/assert-build/modules/0_Test.expected.ll
@@ -5,7 +5,7 @@ target triple = "sbf-solana-solana"
 
 declare i32 @memcmp(ptr, ptr, i64)
 
-define private void @Test__test() {
+define private void @"0000000000000100_Test_test_FfymrXLxVKvhRk"() {
 entry:
   %local_0 = alloca i64, align 8
   store i64 10, ptr %local_0, align 8

diff --git a/.../tools/move-mv-llvm-compiler/tests/move-ir-tests/bitwise-build/modules/0_Test.expected.ll b/.../tools/move-mv-llvm-compiler/tests/move-ir-tests/bitwise-build/modules/0_Test.expected.ll
@@ -5,7 +5,7 @@ target triple = "sbf-solana-solana"
 
 declare i32 @memcmp(ptr, ptr, i64)
 
-define private i8 @Test__test_and(i8 %0, i8 %1) {
+define private i8 @"0000000000000100_Test_test_and_DFphxaoqiXYNDV"(i8 %0, i8 %1) {
 entry:
   %local_0 = alloca i8, align 1
   %local_1 = alloca i8, align 1
@@ -26,7 +26,7 @@ entry:
   ret i8 %retval
 }
 
-define private i8 @Test__test_or(i8 %0, i8 %1) {
+define private i8 @"0000000000000100_Test_test_or_ABgsHoLgySjeMj"(i8 %0, i8 %1) {
 entry:
   %local_0 = alloca i8, align 1
   %local_1 = alloca i8, align 1
@@ -47,7 +47,7 @@ entry:
   ret i8 %retval
 }
 
-define private i128 @Test__test_shl128(i128 %0, i8 %1) {
+define private i128 @"0000000000000100_Test_test_shl128_FjsWYtVAK5ZT52"(i128 %0, i8 %1) {
 entry:
   %local_0 = alloca i128, align 8
   %local_1 = alloca i8, align 1
@@ -77,7 +77,7 @@ join_bb:                                          ; preds = %entry
   ret i128 %retval
 }
 
-define private i32 @Test__test_shl32(i32 %0, i8 %1) {
+define private i32 @"0000000000000100_Test_test_shl32_BY8MnnQVbnAiqd"(i32 %0, i8 %1) {
 entry:
   %local_0 = alloca i32, align 4
   %local_1 = alloca i8, align 1
@@ -107,7 +107,7 @@ join_bb:                                          ; preds = %entry
   ret i32 %retval
 }
 
-define private i64 @Test__test_shl64(i64 %0, i8 %1) {
+define private i64 @"0000000000000100_Test_test_shl64_6uBaAfC6RR7X2A"(i64 %0, i8 %1) {
 entry:
   %local_0 = alloca i64, align 8
   %local_1 = alloca i8, align 1
@@ -137,7 +137,7 @@ join_bb:                                          ; preds = %entry
   ret i64 %retval
 }
 
-define private i8 @Test__test_shl8(i8 %0, i8 %1) {
+define private i8 @"0000000000000100_Test_test_shl8_GAUo4HFL6n4cUQ"(i8 %0, i8 %1) {
 entry:
   %local_0 = alloca i8, align 1
   %local_1 = alloca i8, align 1
@@ -166,7 +166,7 @@ join_bb:                                          ; preds = %entry
   ret i8 %retval
 }
 
-define private i128 @Test__test_shr128(i128 %0, i8 %1) {
+define private i128 @"0000000000000100_Test_test_shr128_6Uq2b5WWBuctcq"(i128 %0, i8 %1) {
 entry:
   %local_0 = alloca i128, align 8
   %local_1 = alloca i8, align 1
@@ -196,7 +196,7 @@ join_bb:                                          ; preds = %entry
   ret i128 %retval
 }
 
-define private i32 @Test__test_shr32(i32 %0, i8 %1) {
+define private i32 @"0000000000000100_Test_test_shr32_FpQwVwgHroD4FB"(i32 %0, i8 %1) {
 entry:
   %local_0 = alloca i32, align 4
   %local_1 = alloca i8, align 1
@@ -226,7 +226,7 @@ join_bb:                                          ; preds = %entry
   ret i32 %retval
 }
 
-define private i64 @Test__test_shr64(i64 %0, i8 %1) {
+define private i64 @"0000000000000100_Test_test_shr64_DBFfqGmnEJWtN8"(i64 %0, i8 %1) {
 entry:
   %local_0 = alloca i64, align 8
   %local_1 = alloca i8, align 1
@@ -256,7 +256,7 @@ join_bb:                                          ; preds = %entry
   ret i64 %retval
 }
 
-define private i8 @Test__test_shr8(i8 %0, i8 %1) {
+define private i8 @"0000000000000100_Test_test_shr8_5uSFM3pVunbF5g"(i8 %0, i8 %1) {
 entry:
   %local_0 = alloca i8, align 1
   %local_1 = alloca i8, align 1
@@ -285,7 +285,7 @@ join_bb:                                          ; preds = %entry
   ret i8 %retval
 }
 
-define private i8 @Test__test_xor(i8 %0, i8 %1) {
+define private i8 @"0000000000000100_Test_test_xor_4csxK8UYp6BVr8"(i8 %0, i8 %1) {
 entry:
   %local_0 = alloca i8, align 1
   %local_1 = alloca i8, align 1

diff --git a/...age/tools/move-mv-llvm-compiler/tests/move-ir-tests/call-build/modules/0_Test.expected.ll b/...age/tools/move-mv-llvm-compiler/tests/move-ir-tests/call-build/modules/0_Test.expected.ll
@@ -5,7 +5,7 @@ target triple = "sbf-solana-solana"
 
 declare i32 @memcmp(ptr, ptr, i64)
 
-define private i8 @Test__get_sub(i8 %0, i8 %1) {
+define private i8 @"0000000000000100_Test_get_sub_13wN27GrZPghd6"(i8 %0, i8 %1) {
 entry:
   %local_0 = alloca i8, align 1
   %local_1 = alloca i8, align 1
@@ -34,7 +34,7 @@ join_bb:                                          ; preds = %entry
   ret i8 %retval
 }
 
-define private void @Test__test() {
+define private void @"0000000000000100_Test_test_FfymrXLxVKvhRk"() {
 entry:
   %local_0 = alloca i8, align 1
   %local_1 = alloca i8, align 1
@@ -48,7 +48,7 @@ entry:
   store i8 3, ptr %local_2, align 1
   %call_arg_0 = load i8, ptr %local_1, align 1
   %call_arg_1 = load i8, ptr %local_2, align 1
-  %retval = call i8 @Test__get_sub(i8 %call_arg_0, i8 %call_arg_1)
+  %retval = call i8 @"0000000000000100_Test_get_sub_13wN27GrZPghd6"(i8 %call_arg_0, i8 %call_arg_1)
   store i8 %retval, ptr %local_3, align 1
   %load_store_tmp = load i8, ptr %local_3, align 1
   store i8 %load_store_tmp, ptr %local_0, align 1

diff --git a/...age/tools/move-mv-llvm-compiler/tests/move-ir-tests/cast-build/modules/0_Test.expected.ll b/...age/tools/move-mv-llvm-compiler/tests/move-ir-tests/cast-build/modules/0_Test.expected.ll
@@ -5,7 +5,7 @@ target triple = "sbf-solana-solana"
 
 declare i32 @memcmp(ptr, ptr, i64)
 
-define private i32 @Test__cast_u32(i8 %0) {
+define private i32 @"0000000000000100_Test_cast_u32_HTSGZTK3vZ9o3P"(i8 %0) {
 entry:
   %local_0 = alloca i8, align 1
   %local_1 = alloca i8, align 1
@@ -20,7 +20,7 @@ entry:
   ret i32 %retval
 }
 
-define private i64 @Test__cast_u64(i8 %0) {
+define private i64 @"0000000000000100_Test_cast_u64_mv2mrQJuzMJGw2"(i8 %0) {
 entry:
   %local_0 = alloca i8, align 1
   %local_1 = alloca i8, align 1
@@ -35,7 +35,7 @@ entry:
   ret i64 %retval
 }
 
-define private i8 @Test__cast_u8(i32 %0) {
+define private i8 @"0000000000000100_Test_cast_u8_AvxxS7Jvff27Kr"(i32 %0) {
 entry:
   %local_0 = alloca i32, align 4
   %local_1 = alloca i32, align 4