add FriendlyElec's 5.10-rkr6 NanoPi R5S/R5C/R5S-LTS (update from 6.1-…

…rkr1) - straight from https://github.com/friendlyarm/kernel-rockchip/tree/nanopi6-v6.1.y - at sha1 34cd890017997ea3be9524977b278ed4c21298b9 - just blatantly overwrite with 6.1-rkr1 stuff
armbian · Jul 10, 2024 · 709c51c · 709c51c
1 parent e5586b9
commit 709c51c
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Showing 4 changed files with 88 additions and 14 deletions.
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nanopi5-common.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-nanopi5-common.dtsi
@@ -84,7 +84,7 @@
 		compatible = "simple-audio-card";
 		simple-audio-card,format = "i2s";
 		simple-audio-card,mclk-fs = <128>;
-		simple-audio-card,name = "rockchip,hdmi";
+		simple-audio-card,name = "rockchip,hdmi0";
 		status = "disabled";
 
 		simple-audio-card,cpu {
@@ -123,7 +123,7 @@
 	};
 
 	rk809_sound: rk809-sound {
-		status = "okay";
+		status = "disabled";
 		compatible = "simple-audio-card";
 		simple-audio-card,format = "i2s";
 		simple-audio-card,name = "rockchip,rk809-codec";
@@ -133,7 +133,7 @@
 			sound-dai = <&i2s1_8ch>;
 		};
 		simple-audio-card,codec {
-			sound-dai = <&rk809_codec 0>;
+			sound-dai = <&rk809_codec>;
 		};
 	};
 
@@ -229,6 +229,19 @@
 		pinctrl-0 = <&vcc5v0_otg_en>;
 	};
 
+	simple_bat: battery {
+		compatible = "simple-battery";
+		voltage-max-design-microvolt = <13000000>;
+		voltage-min-design-microvolt = <4500000>;
+	};
+
+	simple_vin: simple-vin {
+		compatible = "simple-adc-power-v1";
+		io-channels = <&saradc 2>;
+		io-channel-names = "voltage";
+		monitored-battery = <&simple_bat>;
+	};
+
 	test-power {
 		status = "okay";
 	};
@@ -562,7 +575,7 @@
 		};
 
 		rk809_codec: codec {
-			#sound-dai-cells = <1>;
+			#sound-dai-cells = <0>;
 			compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
 			clocks = <&cru I2S1_MCLKOUT>;
 			clock-names = "mclk";
@@ -573,7 +586,6 @@
 			pinctrl-0 = <&i2s1m0_mclk>;
 			hp-volume = <20>;
 			spk-volume = <3>;
-			mic-in-differential;
 			status = "okay";
 		};
 	};
@@ -592,7 +604,7 @@
 
 &i2s1_8ch {
 	status = "disabled";
-	rockchip,clk-trcm = <1>;
+	rockchip,trcm-sync-tx-only;
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2s1m0_sclktx
 		     &i2s1m0_lrcktx
@@ -774,6 +786,10 @@
 	status = "okay";
 };
 
+&crypto {
+	status = "okay";
+};
+
 &rockchip_suspend {
 	status = "okay";
 };
@@ -842,11 +858,11 @@
 };
 
 &u2phy0_otg {
+	phy-supply = <&vcc5v0_otg>;
 	status = "okay";
 };
 
 &u2phy1_host {
-	phy-supply = <&vcc5v0_otg>;
 	status = "okay";
 };
 
@@ -929,8 +945,9 @@
 
 &vop {
 	status = "okay";
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+	vop-supply = <&vdd_logic>;
+	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
+	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>, <&cru PLL_GPLL>;
 	support-multi-area;
 };
 

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nanopi5-rev01.dts b/arch/arm64/boot/dts/rockchip/rk3568-nanopi5-rev01.dts
@@ -178,12 +178,12 @@
 	reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 
-	pcie@00 {
+	pcie@0,0 {
 		reg = <0x00000000 0 0 0 0>;
 		#address-cells = <3>;
 		#size-cells = <2>;
 
-		r8125_1: pcie@01,0 {
+		r8125_1: pcie@1,0 {
 			reg = <0x000000 0 0 0 0>;
 			local-mac-address = [ 00 00 00 00 00 00 ];
 		};
@@ -197,7 +197,7 @@
 	reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 
-	pcie@10 {
+	pcie@0,0 {
 		reg = <0x00100000 0 0 0 0>;
 		#address-cells = <3>;
 		#size-cells = <2>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nanopi5-rev02.dts b/arch/arm64/boot/dts/rockchip/rk3568-nanopi5-rev02.dts
@@ -130,7 +130,7 @@
 	reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 
-	pcie@10 {
+	pcie@0,0 {
 		reg = <0x00100000 0 0 0 0>;
 		#address-cells = <3>;
 		#size-cells = <2>;
@@ -148,7 +148,7 @@
 	reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 
-	pcie@20 {
+	pcie@0,0 {
 		reg = <0x00200000 0 0 0 0>;
 		#address-cells = <3>;
 		#size-cells = <2>;
@@ -214,3 +214,8 @@
 &sfc {
 	status = "disabled";
 };
+
+&simple_bat {
+	voltage-max-design-microvolt = <5400000>;
+	voltage-min-design-microvolt = <4200000>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nanopi5-rev05.dts b/arch/arm64/boot/dts/rockchip/rk3568-nanopi5-rev05.dts
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyelec.com)
+ */
+
+/dts-v1/;
+#include "rk3568-nanopi5-rev01.dts"
+
+/ {
+	model = "FriendlyElec NanoPi R5S LTS";
+	compatible = "friendlyelec,nanopi-r5s", "rockchip,rk3568";
+};
+
+&mach {
+	hwrev = <5>;
+	model = "NanoPi R5S LTS";
+};
+
+&pcie3x2 {
+	max-link-speed = <3>;
+};
+
+&pwm7 {
+	compatible = "rockchip,remotectl-pwm";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm7_pins>;
+	remote_pwm_id = <7>;
+	handle_cpu_id = <1>;
+	remote_support_psci = <0>;
+	status = "okay";
+
+	ir_key1 {
+		rockchip,usercode = <0xc43b>;
+		rockchip,key_table =
+			<0xff	KEY_POWER>,
+			<0xef	KEY_LEFT>,
+			<0xed	KEY_RIGHT>,
+			<0xf2	KEY_UP>,
+			<0xea	KEY_DOWN>,
+			<0xee	KEY_ENTER>,
+			<0xe9	KEY_MUTE>,
+			<0xf1	KEY_VOLUMEDOWN>,
+			<0xf3	KEY_VOLUMEUP>,
+			<0xae	KEY_MENU>,
+			<0xeb	KEY_LEFTMETA>,
+			<0xaf	KEY_BACK>,
+			<0xf7	KEY_MODE>,
+			<0xe5	KEY_SYSRQ>,
+			<0xf5	KEY_ESC>;
+	};
+};