Skip to content

Commit

Permalink
arch: arm64: dts: add board orangepi5 max
Browse files Browse the repository at this point in the history
  • Loading branch information
@amazingfate
amazingfate committed Nov 24, 2024
1 parent ca131d6 commit d619812
Show file tree
Hide file tree
Showing 5 changed files with 1,869 additions and 0 deletions.
1 change: 1 addition & 0 deletions arch/arm64/boot/dts/rockchip/Makefile
View file
Original file line number Diff line number Diff line change
Expand Up @@ -368,6 +368,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nvr-demo3-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nvr-demo3-v10-android.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-pcie-ep-demo-v11.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-pcie-ep-demo-v11-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-max.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5-itx.dtb
Expand Down
164 changes: 164 additions & 0 deletions arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max-camera0.dtsi
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,164 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/

&csi2_dphy0 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;

mipidphy0_in_ucam0: endpoint@0 {
reg = <0>;
remote-endpoint = <&ov13850_out0>;
data-lanes = <1 2>;
};

mipidphy0_in_ucam1: endpoint@1 {
reg = <1>;
remote-endpoint = <&ov13855_out0>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi2_csi2_input>;
};
};
};
};

&i2c6 {
status = "okay";

vm149c_p0: vm149c-p0@c {
compatible = "silicon touch,vm149c";
status = "disabled";
reg = <0x0c>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
};

ov13850_0: ov13850-0@10 {
compatible = "ovti,ov13850";
status = "disabled";
reg = <0x10>;
clocks = <&cru CLK_MIPI_CAMARAOUT_M1>;
clock-names = "xvclk";
pinctrl-names = "default";
pinctrl-0 = <&mipim1_camera1_clk>;
reset-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-CT0116";
rockchip,camera-module-lens-name = "default";
lens-focus = <&vm149c_p0>;
port {
ov13850_out0: endpoint {
remote-endpoint = <&mipidphy0_in_ucam0>;
data-lanes = <1 2>;
};
};
};

dw9714_p0: dw9714-p0@c {
compatible = "dongwoon,dw9714";
status = "disabled";
reg = <0x0c>;
rockchip,camera-module-index = <0>;
rockchip,vcm-start-current = <10>;
rockchip,vcm-rated-current = <85>;
rockchip,vcm-step-mode = <5>;
rockchip,camera-module-facing = "back";
};

ov13855_0: ov13855-0@36 {
compatible = "ovti,ov13855";
status = "disabled";
reg = <0x36>;
clocks = <&cru CLK_MIPI_CAMARAOUT_M1>;
clock-names = "xvclk";
pinctrl-names = "default";
pinctrl-0 = <&mipim1_camera1_clk>;
reset-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2016-FV1";
rockchip,camera-module-lens-name = "default";
lens-focus = <&dw9714_p0>;
port {
ov13855_out0: endpoint {
remote-endpoint = <&mipidphy0_in_ucam1>;
data-lanes = <1 2>;
};
};
};
};

&mipi2_csi2 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi2_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi2_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in2>;
};
};
};
};

&rkcif_mipi_lvds2 {
status = "disabled";
port {
cif_mipi_in2: endpoint {
remote-endpoint = <&mipi2_csi2_output>;
};
};
};

&rkcif_mipi_lvds2_sditf {
status = "disabled";
port {
mipi2_lvds_sditf: endpoint {
remote-endpoint = <&isp0_vir2>;
};
};
};

&rkisp0_vir2 {
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
isp0_vir2: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi2_lvds_sditf>;
};
};
};
166 changes: 166 additions & 0 deletions arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max-camera1.dtsi
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,166 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/

&csi2_dphy3 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;

mipidphy1_in_ucam0: endpoint@0 {
reg = <0>;
remote-endpoint = <&ov13850_out1>;
data-lanes = <1 2>;
};

mipidphy1_in_ucam1: endpoint@1 {
reg = <1>;
remote-endpoint = <&ov13855_out1>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidphy1_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi4_csi2_input>;
};
};
};
};

&i2c3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c3m0_xfer>;

vm149c_p1: vm149c-p1@c {
compatible = "silicon touch,vm149c";
status = "disabled";
reg = <0x0c>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "back";
};

ov13850_1: ov13850-1@10 {
compatible = "ovti,ov13850";
status = "disabled";
reg = <0x10>;
clocks = <&cru CLK_MIPI_CAMARAOUT_M2>;
clock-names = "xvclk";
pinctrl-names = "default";
pinctrl-0 = <&mipim1_camera2_clk>;
reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-CT0116";
rockchip,camera-module-lens-name = "default";
lens-focus = <&vm149c_p1>;
port {
ov13850_out1: endpoint {
remote-endpoint = <&mipidphy1_in_ucam0>;
data-lanes = <1 2>;
};
};
};

dw9714_p1: dw9714-p1@c {
compatible = "dongwoon,dw9714";
status = "disabled";
reg = <0x0c>;
rockchip,camera-module-index = <1>;
rockchip,vcm-start-current = <10>;
rockchip,vcm-rated-current = <85>;
rockchip,vcm-step-mode = <5>;
rockchip,camera-module-facing = "back";
};

ov13855_1: ov13855-1@36 {
compatible = "ovti,ov13855";
status = "disabled";
reg = <0x36>;
clocks = <&cru CLK_MIPI_CAMARAOUT_M2>;
clock-names = "xvclk";
pinctrl-names = "default";
pinctrl-0 = <&mipim1_camera2_clk>;
reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2016-FV1";
rockchip,camera-module-lens-name = "default";
lens-focus = <&dw9714_p1>;
port {
ov13855_out1: endpoint {
remote-endpoint = <&mipidphy1_in_ucam1>;
data-lanes = <1 2>;
};
};
};
};

&mipi4_csi2 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi4_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidphy1_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi4_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in4>;
};
};
};
};

&rkcif_mipi_lvds4 {
status = "disabled";
port {
cif_mipi_in4: endpoint {
remote-endpoint = <&mipi4_csi2_output>;
};
};
};

&rkcif_mipi_lvds4_sditf {
status = "disabled";
port {
mipi4_lvds_sditf: endpoint {
remote-endpoint = <&isp1_vir1>;
};
};
};

&rkisp1_vir1 {
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
isp1_vir1: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi4_lvds_sditf>;
};
};
};
Loading

0 comments on commit d619812

Please sign in to comment.