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arm64: dts: rockchip: Add the Radxa Zero 3
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arch/arm64/boot/dts/rockchip/rk3566-radxa-zero3-ap6212.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
/* | ||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd. | ||
* Copyright (c) 2023 Radxa Limited. | ||
* | ||
*/ | ||
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/dts-v1/; | ||
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#include "rk3566-radxa-zero3.dtsi" | ||
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/ { | ||
model = "Radxa ZERO 3"; | ||
compatible ="radxa,zero3", "rockchip,rk3566"; | ||
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wireless_wlan: wireless-wlan { | ||
compatible = "wlan-platdata"; | ||
wifi_chip_type = "ap6212"; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&wifi_host_wake_irq>; | ||
WIFI,host_wake_irq = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; | ||
status = "okay"; | ||
}; | ||
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sdio_pwrseq: sdio-pwrseq { | ||
compatible = "mmc-pwrseq-simple"; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&wifi_enable_h>; | ||
reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; | ||
}; | ||
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board_antenna: board-antenna { | ||
status = "okay"; | ||
compatible = "regulator-fixed"; | ||
enable-active-low; | ||
gpio = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; | ||
regulator-always-on; | ||
regulator-boot-on; | ||
pinctrl-0 = <&ant_1>; | ||
pinctrl-names = "default"; | ||
regulator-name = "board_antenna"; | ||
}; | ||
}; | ||
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&uart1 { | ||
status = "okay"; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; | ||
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bluetooth { | ||
compatible = "brcm,bcm43438-bt"; | ||
clocks = <&rk817 1>; | ||
clock-names = "lpo"; | ||
device-wakeup-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; | ||
host-wakeup-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; | ||
shutdown-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; | ||
max-speed = <1500000>; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; | ||
vbat-supply = <&vcc3v3_sys>; | ||
vddio-supply = <&vcc_1v8>; | ||
}; | ||
}; | ||
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&sdmmc1 { | ||
supports-sdio; | ||
bus-width = <4>; | ||
disable-wp; | ||
cap-sd-highspeed; | ||
cap-sdio-irq; | ||
keep-power-in-suspend; | ||
non-removable; | ||
rockchip,default-sample-phase = <180>; | ||
mmc-pwrseq = <&sdio_pwrseq>; | ||
non-removable; | ||
no-sd; | ||
no-mmc; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; | ||
sd-uhs-sdr104; | ||
status = "okay"; | ||
}; | ||
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&pinctrl { | ||
wifi { | ||
wifi_enable_h: wifi-enable-h { | ||
rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; | ||
}; | ||
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wifi_host_wake_irq: wifi-host-wake-irq { | ||
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>; | ||
}; | ||
}; | ||
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bt { | ||
bt_enable_h: bt-enable-h { | ||
rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; | ||
}; | ||
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bt_host_wake_l: bt-host-wake-l { | ||
rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; | ||
}; | ||
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bt_wake_l: bt-wake-l { | ||
rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; | ||
}; | ||
}; | ||
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sdmmc1 { | ||
/omit-if-no-ref/ | ||
sdmmc1_bus4: sdmmc1-bus4 { | ||
rockchip,pins = | ||
/* sdmmc1_d0 */ | ||
<2 RK_PA3 1 &pcfg_pull_up_drv_level_12>, | ||
/* sdmmc1_d1 */ | ||
<2 RK_PA4 1 &pcfg_pull_up_drv_level_12>, | ||
/* sdmmc1_d2 */ | ||
<2 RK_PA5 1 &pcfg_pull_up_drv_level_12>, | ||
/* sdmmc1_d3 */ | ||
<2 RK_PA6 1 &pcfg_pull_up_drv_level_12>; | ||
}; | ||
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/omit-if-no-ref/ | ||
sdmmc1_clk: sdmmc1-clk { | ||
rockchip,pins = | ||
/* sdmmc1_clk */ | ||
<2 RK_PB0 1 &pcfg_pull_up_drv_level_12>; | ||
}; | ||
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/omit-if-no-ref/ | ||
sdmmc1_cmd: sdmmc1-cmd { | ||
rockchip,pins = | ||
/* sdmmc1_cmd */ | ||
<2 RK_PA7 1 &pcfg_pull_up_drv_level_12>; | ||
}; | ||
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/omit-if-no-ref/ | ||
sdmmc1_det: sdmmc1-det { | ||
rockchip,pins = | ||
/* sdmmc1_det */ | ||
<2 RK_PB2 1 &pcfg_pull_up>; | ||
}; | ||
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/omit-if-no-ref/ | ||
sdmmc1_pwren: sdmmc1-pwren { | ||
rockchip,pins = | ||
/* sdmmc1_pwren */ | ||
<2 RK_PB1 1 &pcfg_pull_none>; | ||
}; | ||
}; | ||
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antenna { | ||
ant_1: ant-1 { | ||
rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_down>; | ||
}; | ||
}; | ||
}; |
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
/* | ||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd. | ||
* Copyright (c) 2023 Radxa Limited. | ||
* | ||
*/ | ||
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/dts-v1/; | ||
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#include "rk3566-radxa-zero3.dtsi" | ||
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/ { | ||
model = "Radxa ZERO 3"; | ||
compatible ="radxa,zero3-aic8800ds2", "rockchip,rk3566"; | ||
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wireless_wlan: wireless-wlan { | ||
compatible = "wlan-platdata"; | ||
rockchip,grf = <&grf>; | ||
WIFI,poweren_gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; | ||
status = "okay"; | ||
}; | ||
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wireless_bluetooth: wireless-bluetooth { | ||
compatible = "bluetooth-platdata"; | ||
uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; | ||
pinctrl-names = "default", "rts_gpio"; | ||
pinctrl-0 = <&uart1m0_rtsn>; | ||
pinctrl-1 = <&uart1_gpios>; | ||
BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; | ||
BT,wake_gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; | ||
BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; | ||
status = "okay"; | ||
}; | ||
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sdio_pwrseq: sdio-pwrseq { | ||
compatible = "mmc-pwrseq-simple"; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&wifi_enable_h>; | ||
reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; | ||
}; | ||
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board_antenna: board-antenna { | ||
status = "okay"; | ||
compatible = "regulator-fixed"; | ||
enable-active-low; | ||
gpio = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; | ||
regulator-always-on; | ||
regulator-boot-on; | ||
pinctrl-0 = <&ant_1>; | ||
pinctrl-names = "default"; | ||
regulator-name = "board_antenna"; | ||
}; | ||
}; | ||
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&uart1 { | ||
status = "okay"; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; | ||
}; | ||
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&sdmmc1 { | ||
supports-sdio; | ||
bus-width = <4>; | ||
disable-wp; | ||
cap-sd-highspeed; | ||
cap-sdio-irq; | ||
keep-power-in-suspend; | ||
non-removable; | ||
rockchip,default-sample-phase = <180>; | ||
mmc-pwrseq = <&sdio_pwrseq>; | ||
non-removable; | ||
no-sd; | ||
no-mmc; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; | ||
sd-uhs-sdr104; | ||
status = "okay"; | ||
}; | ||
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&pinctrl { | ||
wifi { | ||
wifi_enable_h: wifi-enable-h { | ||
rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; | ||
}; | ||
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}; | ||
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wireless-bluetooth { | ||
uart1_gpios: uart1-gpios { | ||
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; | ||
}; | ||
}; | ||
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sdmmc1 { | ||
/omit-if-no-ref/ | ||
sdmmc1_bus4: sdmmc1-bus4 { | ||
rockchip,pins = | ||
/* sdmmc1_d0 */ | ||
<2 RK_PA3 1 &pcfg_pull_up_drv_level_12>, | ||
/* sdmmc1_d1 */ | ||
<2 RK_PA4 1 &pcfg_pull_up_drv_level_12>, | ||
/* sdmmc1_d2 */ | ||
<2 RK_PA5 1 &pcfg_pull_up_drv_level_12>, | ||
/* sdmmc1_d3 */ | ||
<2 RK_PA6 1 &pcfg_pull_up_drv_level_12>; | ||
}; | ||
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/omit-if-no-ref/ | ||
sdmmc1_clk: sdmmc1-clk { | ||
rockchip,pins = | ||
/* sdmmc1_clk */ | ||
<2 RK_PB0 1 &pcfg_pull_up_drv_level_12>; | ||
}; | ||
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/omit-if-no-ref/ | ||
sdmmc1_cmd: sdmmc1-cmd { | ||
rockchip,pins = | ||
/* sdmmc1_cmd */ | ||
<2 RK_PA7 1 &pcfg_pull_up_drv_level_12>; | ||
}; | ||
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/omit-if-no-ref/ | ||
sdmmc1_det: sdmmc1-det { | ||
rockchip,pins = | ||
/* sdmmc1_det */ | ||
<2 RK_PB2 1 &pcfg_pull_up>; | ||
}; | ||
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/omit-if-no-ref/ | ||
sdmmc1_pwren: sdmmc1-pwren { | ||
rockchip,pins = | ||
/* sdmmc1_pwren */ | ||
<2 RK_PB1 1 &pcfg_pull_none>; | ||
}; | ||
}; | ||
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antenna { | ||
ant_1: ant-1 { | ||
rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_down>; | ||
}; | ||
}; | ||
}; |
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