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Update radxa 5 itx from upstream (#263)
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* Update radxa 5 itx from upstream
* Revert clocks because not exist
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SuperKali authored and amazingfate committed Nov 24, 2024
1 parent df4b3dd commit f4ce827
Showing 1 changed file with 37 additions and 11 deletions.
48 changes: 37 additions & 11 deletions arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
* Copyright (c) 2022 Radxa Limited
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
* Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd.
*
*/

Expand All @@ -26,6 +26,21 @@

/delete-node/ chosen;

adc_keys: adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
status = "okay";

maskrom-key {
label = "macro";
linux,code = <KEY_MACRO>;
press-threshold-microvolt = <1750>;
};
};

fan0: pwm-fan {
compatible = "pwm-fan";
#cooling-cells = <2>;
Expand Down Expand Up @@ -251,7 +266,13 @@
};
};

hdmiin_dc: hdmiin-dc {
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
};

hdmiin-sound {
status = "okay";
compatible = "rockchip,hdmi";
rockchip,mclk-fs = <128>;
rockchip,format = "i2s";
Expand Down Expand Up @@ -604,7 +625,8 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd &hdmim1_tx1_scl &hdmim1_tx1_sda>;
cec-enable = "true";
cec-enable = "true";
enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
};

&hdmi1_in_vp0 {
Expand All @@ -627,13 +649,13 @@
&hdmirx_ctrler {
status = "okay";

#sound-dai-cells = <1>;
/* Effective level used to trigger HPD: 0-low, 1-high */
hpd-trigger-level = <1>;
hdmirx-det-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_det>;
pinctrl-names = "default";
#sound-dai-cells = <1>;
};

&hdptxphy_hdmi0 {
Expand Down Expand Up @@ -671,22 +693,26 @@
/* vp0 & vp1 splice for 8K output */
&vp0 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER0>;
cursor-win-id = <ROCKCHIP_VOP2_ESMART0>;
};

&vp1 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER1>;
cursor-win-id = <ROCKCHIP_VOP2_ESMART1>;
};

&vp2 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>;
rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER2>;
cursor-win-id = <ROCKCHIP_VOP2_ESMART2>;
};

&vp3 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>;
rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER3>;
cursor-win-id = <ROCKCHIP_VOP2_ESMART3>;
};

&u2phy2 {
Expand Down Expand Up @@ -984,13 +1010,13 @@
&soc_thermal {
sustainable-power = <5000>; /* milliwatts */
cooling-maps {
map3 {
map4 {
trip = <&target>;
cooling-device =
<&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
contribution = <8192>;
};
map4 {
map5 {
trip = <&threshold>;
cooling-device =
<&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
Expand Down Expand Up @@ -1211,4 +1237,4 @@
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
};

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