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avr_isp: add dump to test sigrokproject/libsigrokdecode#113
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AVR ISP / Atmel ATmega48 | ||
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This is an example capture of the AVR in-system programming (ISP) protocol. | ||
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The device used for ISP was a ESP32-S2 containing code to progam the target using ISP. | ||
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The target was a board with an Atmel ATmega48 chip. | ||
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The capture contains the serial programming instructions: | ||
- Programming enable | ||
- Chip erase | ||
- Poll RDY/nBSY | ||
- Load program memory page, high byte | ||
- Load program memory page, low byte | ||
- Read signature byte | ||
- Read program memory, low byte | ||
- Read lock bits | ||
- Read fuse bits | ||
- Read fuse high bits | ||
- Read extended fuse bits | ||
- Read calibration byte | ||
- Write program memory page | ||
- Write fuse bits | ||
- Write fuse high bits | ||
- Write extended fuse bits | ||
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Logic analyzer setup | ||
-------------------- | ||
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The logic analyzer used was a Cypress FX2 development board (at 2MHz): | ||
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Probe AVR ISP header | ||
------------------------- | ||
0 (black) SCK | ||
1 (brown) MISO | ||
2 (red) MOSI | ||
3 (orange) CS |
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