Add support for TP-Link TL-WR1041N v2 (AR9342 based)

Signed-off-by: 魏亚祥 <[email protected]>
baidxi · Aug 30, 2017 · b29f18a · b29f18a
1 parent 2172f8b
commit b29f18a
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Showing 6 changed files with 26 additions and 1 deletion.
diff --git a/Makefile b/Makefile
@@ -276,7 +276,8 @@ zbtlink_zbt-we1526:
 	@$(call build,256,1,ETH_CONFIG=_s27)
 
 tp-link_tl-wdr3600_v1 \
-tp-link_tl-wdr43x0_v1:
+tp-link_tl-wdr43x0_v1 \
+tp-link_tl-wr1041n_v2:
 	@$(call build,123,1,ETH_CONFIG=_s17)
 
 unwireddevices_unwired-one:

diff --git a/README.md b/README.md
@@ -94,6 +94,9 @@ Currently supported devices:
   - TP-Link TL-WR841N/D v8
   - YunCore CPE870
 
+- **Atheros AR9342**:
+  - TP-Link TL-WR1041N v2
+
 - **Atheros AR9344**:
   - TP-Link TL-WDR3500 v1
   - TP-Link TL-WDR3600 v1
@@ -158,6 +161,7 @@ More information about supported devices:
 | [TP-Link TL-WDR3500 v1](http://wiki.openwrt.org/toh/tp-link/tl-wdr3500) | AR9344 | 8 MiB | 128 MiB DDR2 | 64 KiB, LZMA | RO |
 | [TP-Link TL-WDR3600 v1](http://wiki.openwrt.org/toh/tp-link/tl-wdr3600) | AR9344 | 8 MiB | 128 MiB DDR2 | 64 KiB, LZMA | RO |
 | [TP-Link TL-WDR43x0 v1](http://wiki.openwrt.org/toh/tp-link/tl-wdr4300) | AR9344 | 8 MiB | 128 MiB DDR2 | 64 KiB, LZMA | RO |
+| [TP-Link TL-WR1041N v2](http://wiki.openwrt.org/toh/tp-link/tl-wr1041n) | AR9342 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO |
 | [TP-Link TL-WR703N](http://wiki.openwrt.org/toh/tp-link/tl-wr703n) | AR9331 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO |
 | [TP-Link TL-WR710N v1](http://wiki.openwrt.org/toh/tp-link/tl-wr710n) | AR9331 | 8 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO |
 | [TP-Link TL-WR720N v3](http://wiki.openwrt.org/toh/tp-link/tl-wr720n) | AR9331 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO |

diff --git a/u-boot/Makefile b/u-boot/Makefile
@@ -598,6 +598,14 @@ tp-link_tl-wdr43x0_v1: ar934x_common lsdk_kernel
 	@$(call define_add,CFG_DUAL_PHY_SUPPORT,1)
 	@$(MKCONFIG) -a db12x mips mips db12x ar7240 ar7240
 
+tp-link_tl-wr1041n_v2: ar934x_common lsdk_kernel
+	@$(call config_init,TP-Link TL-WR1041N v2,tl-wr1041n-v2,4,14,1,QCA_AR9342_SOC)
+	@$(call define_add,CONFIG_FOR_TPLINK_WR1041N_V2,1)
+	@$(call define_add,CFG_ATHRS17_PHY,1)
+	@$(call define_add,CFG_AG7240_NMACS,1)
+	@$(call define_add,CFG_DUAL_PHY_SUPPORT,1)
+	@$(MKCONFIG) -a db12x mips mips db12x ar7240 ar7240
+
 tp-link_tl-wr703n_v1: ar933x_common lsdk_kernel
 	@$(call config_init,TP-Link TL-WR703N v1,tl-wr703n-v1,4,11,,QCA_AR933X_SOC)
 	@$(call define_add,CONFIG_FOR_TPLINK_WR703N_V1,1)

diff --git a/u-boot/board/ar7240/common/common.c b/u-boot/board/ar7240/common/common.c
@@ -53,6 +53,9 @@ void qca_soc_name_rev(char *buf)
 	case QCA_RST_REVISION_ID_MAJOR_AR9341_VAL:
 		sprintf(buf, "AR9341 rev. %d", rev);
 		break;
+	case QCA_RST_REVISION_ID_MAJOR_AR9342_VAL:
+		sprintf(buf, "AR9342 rev. %d", rev);
+		break;
 	case QCA_RST_REVISION_ID_MAJOR_AR9344_VAL:
 		sprintf(buf, "AR9344 rev. %d", rev);
 		break;

diff --git a/u-boot/include/configs/db12x.h b/u-boot/include/configs/db12x.h
@@ -51,6 +51,13 @@
 	#define CONFIG_QCA_GPIO_MASK_OUT_INIT_H	GPIO12 |\
 						CONFIG_QCA_GPIO_MASK_LED_ACT_L
 
+#elif defined(CONFIG_FOR_TPLINK_WR1041N_V2)
+
+	#define CONFIG_QCA_GPIO_MASK_LED_ACT_L	GPIO11 | GPIO12 | GPIO13
+	#define CONFIG_QCA_GPIO_MASK_OUT	CONFIG_QCA_GPIO_MASK_LED_ACT_L
+	#define CONFIG_QCA_GPIO_MASK_IN		GPIO14
+	#define CONFIG_QCA_GPIO_MASK_OUT_INIT_H	CONFIG_QCA_GPIO_MASK_LED_ACT_L
+
 #elif defined(CONFIG_FOR_TPLINK_MR3420_V2)
 
 	#define CONFIG_QCA_GPIO_MASK_LED_ACT_L	GPIO11 | GPIO12 | GPIO13 |\
@@ -238,6 +245,7 @@
     defined(CONFIG_FOR_TPLINK_WDR3600_V1) ||\
     defined(CONFIG_FOR_TPLINK_WDR43X0_V1) ||\
     defined(CONFIG_FOR_TPLINK_WDR3500_V1) ||\
+    defined(CONFIG_FOR_TPLINK_WR1041N_V2) ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V8)  ||\
     defined(CONFIG_FOR_YUNCORE_CPE870)
 

diff --git a/u-boot/include/soc/qca_soc_common.h b/u-boot/include/soc/qca_soc_common.h
@@ -1723,6 +1723,7 @@
 #define QCA_RST_REVISION_ID_MAJOR_AR9330_VAL		0x0110
 #define QCA_RST_REVISION_ID_MAJOR_AR9331_VAL		0x1110
 #define QCA_RST_REVISION_ID_MAJOR_AR9341_VAL		0x0120
+#define QCA_RST_REVISION_ID_MAJOR_AR9342_VAL		0x1120
 #define QCA_RST_REVISION_ID_MAJOR_AR9344_VAL		0x2120
 #define QCA_RST_REVISION_ID_MAJOR_QCA953X_VAL		0x0140
 #define QCA_RST_REVISION_ID_MAJOR_QCA953X_V2_VAL	0x0160