course-lab_1

Board: PYNQ-Z2, Vitis version: 2022.1
PYNQ-Z2 SD card image: v2.7

Youtube Demo Video (Vitis version: 2020.2)

Running 2022.1-Workbook-Lab1 on Ubuntu VM

The 2022.1-Workbook-Lab1.pdf was tested on Windows host Vitis. While you running Workbook on Ubuntu VM, some items are needed to concern in following experimental steps.

Vitis HLS

• The Vitis HLS can be invoked by two ways: (1) using MobaXterm SSH to Ubuntu VM and executing vitis_hls (2) opening Ubuntu VM terminal and executing vitis_hls(recommended).
• vitis_hls is running as a GUI. It is maybe slow under MobaXterm connection and while remote GUI is not working you need to restart MobaXterm.
• git clone https://github.com/bol-edu/course-lab_1 ~/course-lab_1, then change to /course-lab_1 and execute vitis_hls.

• Click Create Project and name Project hls_ip under directory ~/course-lab_1

• No Add in Design Files & Testbench Files pages, then change Part to xc7z020clg400-1 which is explained as Workbook p.4.

• Righ click on hls_ip/Source -> New Source File -> add Multiplication.cpp and Multiplication.h from ~/course-lab_1/hls_Multiplication
• Change original #include "multiplication.h" to #include "Multiplication.h" (Ubuntu/Linux is case sensitivity) and comment out #pragma HLS INTERFACE ap_ctrl_none port=return in Multiplication.cpp (as Workbook p.8 & p.9), then save (ctrl+s).

• Righ click on hls_ip/Test Bench -> New Source File -> add MultipTester.cpp from ~/course-lab_1/hls_Multiplication
• Change original #include "multiplication.h" to #include "Multiplication.h" (Ubuntu/Linux is case sensitivity) in MultipTester.cpp and save (ctrl+s).

• Project -> Project Settings -> Synthesis Settings - Top Function name to multip_2num as Workbook p.6.

• Complete validations of C Simulation, C Synthesis, Cosimulation (Dump Trace all) and Open Wave Veiwer for your multiplier as Workbook p.7 ~ p.11.

• Before Export RTL as IP, you need to remove comment out #pragma HLS INTERFACE ap_ctrl_none port=return in Multiplication.cpp (ctrl+s) and re-run C Synthesis as Workbook p.11.

• Export RTL as IP as Workbook p.11. Your multiplier multip_2num saved as a IP in directory ~/course-lab_1/hls_ip which can be reused in later Vivado block design.

Vivado

• Close Vitis HLS GUI and execute vivado as Workbook p.12.

• Click Create Project and name Project vivado under directory ~/course-lab_1

• Add multiplier multip_2num IP to Vivado: Settings -> IP -> Repository -> IP Repositories -> ＋ -> ~/course-lab_1 -> hls_ip -> select -> Multip_2num -> OK

• Create Block Design: double click Create Block Design -> add ZYNQ7 -> add multiplier multip_2num -> click regenerate layout -> click Run Block Automation -> double click ZYNQ7 block -> click Clock Configuration -> change to 100Mhz (due to your clock period is 10ns) -> click Run Connection Automation as Workbook p.16 ~ p.19.

• Right click design_1 in Sources window to generate HDL wrapper as Workbook p.20.

• Generate FPGA bitstream takes about 18 minutes to finish on Ubuntu VM (8GB memory & 2 vcpu of i7＠2.20GHz) with 2 jobs as Workbook p.20. While you see Bitstream Generation Completed window pop (you can cancel the window), your bitstream files are ready to download.

• The Windows MakeBit.bat script can not work on Ubuntu VM as Workbook p.21, please refer the provided copy example. The copy example assume your Vivado project is ~/course-lab_1/vivado. After copy FPGA bitstream files to ~/course-lab_1, you can download Multip2Num.bit and Multip2Num.hwh via MobaXterm.

cd ~/course-lab_1
cp ./vivado/vivado.runs/impl_1/design_1_wrapper.bit ./Multip2Num.bit
cp ./vivado/vivado.gen/sources_1/bd/design_1/hw_handoff/design_1.hwh ./Multip2Num.hwh

PYNQ-Z2 Board

• Rent your pynq-z2 board from OnlineFPGA and connect it via web browser

all online device boards
{'device': 'pynq_01',  'status': 'available'}
{'device': 'pynq_02',  'status': 'available'}
{'device': 'pynq_03',  'status': 'available'}
{'device': 'pynq_04',  'status': 'available'}
{'device': 'pynq_05',  'status': 'available'}
{'device': 'pynq_06',  'status': 'available'}
{'device': 'pynq_07',  'status': 'available'}
{'device': 'pynq_09',  'status': 'available'}
{'device': 'pynq_11',  'status': 'available'}
{'device': 'pynq_12',  'status': 'available'}
{'device': 'pynq_13',  'status': 'available'}
{'device': 'pynq_14',  'status': 'available'}
{'device': 'pynq_15',  'status': 'available'}
{'device': 'pynq_16',  'status': 'available'}
{'device': 'pynq_17',  'status': 'available'}
{'device': 'pynq_18',  'status': 'available'}

please enter pynq device name which you want to rent:
>> pynq_05
device pynq_05 is available
do you want to rent this device? (y/n)
>> y
user [email protected] rented device pynq_05 successfully
jupyter web ip port is 140.112.207.200:20500, web passwd is EjbnxV and timeup at 06/25/2023 01:20:21

Upload Multip2Num.bit, Multip2Num.hwh and Multip2Num.ipynb to Jupyter Notebook from local via web browser. (Not MobaXterm as Workbook p.21)

• Click Multip2Num.ipynb to open it in new tab and Run its cell. You have verified multiplier multip_2num work correctly on FPGA board.