Experimental stuff that can be run with the QORC SDK.
Additionally, the applications support makefile usage for all tasks - clean/build/flash/load(JLink/OpenOCD) as well as VSCode support out of the box for all of the above, as well as Debug(JLink/OpenOCD).
"DUAL" Flashloader : used to prep a new board with EOSS3 and SPI Flash to flash the bootloader, bootfpga, appfpga and m4app, or to 'reinitialize' a board with updated binaries of bootloader/bootfpga.
Listens to both USBSERIAL, as well as the EOSS3 UART at IO_44/IO_45, so either USB port on the board, or external USB-UART cable can be used to flash the images.
Loading this can be done via JLink/OpenOCD, and then the board can be prepped by using a simple 'flash-initialize' to flash the set of bootloader, bootfpga (usb-serial fpga image), m4app, appfpga images (simple helloworld m4+fpga).
refer : qorc_loadflash_dual
"DUAL" Bootloader : used to flash m4 and/or fpga images onto the SPI Flash, and load them from SPI Flash.
Listens to both USBSERIAL, as well as the EOSS3 UART at IO_44/IO_45, so either USB port on the board, or external USB-UART cable can be used to flash the images.
refer : qorc_bootloader_dual
"CLI" Bootloader : exposes a CLI interface on the USBSERIAL to have a menu-driven BL, expanding the applications beyond flash/load.
warning: UNSTABLE
refer : qorc_bootloader_cli
A set of projects for different scenarios that be used as a 'template' to create a new project painlessly and then add any features needed, without needing to worry about changes in the build/flash/load/debug infrastructure.
qorc_helloworldm4 : project which uses only the Cortex-M4 core of the EOSS3
qorc_helloworldfpga : project which uses only the eFPGA core of the EOSS3
qorc_helloworldm4fpga : project which uses both the Cortex-M4 core and eFPGA core of the EOSS3 (without communication between M4 and eFPGA cores)
qorc_helloworldm4fpgaheader : project which uses both the Cortex-M4 core and eFPGA core of the EOSS3 (without communication between M4 and eFPGA cores)
The difference in this project vs (3) is that, the fpga code is built to generate a 'C Header' with a binary array containing the FPGA bitstream instead of a separate binary image.
This 'C Header' is included as regular C code and compiled into a single binary for the Cortex-M4, but contains code for both the Cortex-M4 as well as the FPGA.
This is more of a legacy method, and can be used if needed.
Simple "PWM" Module Example
Simple "BREATHE" Module Example
Simple GPIO CONTROLLER Example : control all EOSS3 IOs using FPGA, from M4
Simple PWM CONTROLLER Example : built on top of the PWM example, use from M4
Simple BREATHE CONTROLLER Example : built on top of the BREATHE example, use from M4
Simple TIMER CONTROLLER Example : use TIMER on FPGA, use from M4, provides Interrupt on Timer Expiry from FPGA to M4, illustrates both Wishbone access and Interrupt Path
Composite FPGA_IP with all of the above to illustrate a building-block method of having multiple Functional Blocks in the design, all accessible from the M4, and co-operatively sharing the IOs
Dynamically load FPGA images as and when needed:
warning: UNSTABLE
- qorc_fpgareload_flash : demo for loading different FPGA bitstreams stored in SPI flash.
- qorc_fpgareload_header : demo for loading different FPGA bitstreams built into the Cortex-M4 binary (legacy 'C Header' FPGA bitstreams)
Pygmy Test:
- qorc_pygmy_test : a test code to verify various peripherals attached to the Pygmy-based boards from OptimusLogic.
QORC SDK Setup
https://qorc-sdk.readthedocs.io/en/latest/qorc-setup/qorc-setup.html
QORC SDK FPGA Toolchain : Mapping Pins in the PCF File
https://quicklogic-fpga-tool-docs.readthedocs.io/en/latest/tutorial/PcfDescription.html
QORC SDK FPGA Toolchain : Details of Standalone Binary structure
https://quicklogic-fpga-tool-docs.readthedocs.io/en/latest/tutorial/GeneratetheBinaryFile.html
QORC SDK BOOTLOADER : M4/FPGA Loading Details (needs cleanup)
Features, Pinouts of various devkits (BB0, BB4, Sensei-Lite, Sensei):