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soc: introduce the EFR32MG24B210F1536IM48
The EFR32MG24B210F1536IM48 has 4 more GPIOs than the EFR32MG24B310F1536IM48, and does not support the high accuracy mode for the IADC. (cherry picked from commit f0fee21) Original-Signed-off-by: Daniel Fuchs <[email protected]> GitOrigin-RevId: f0fee21 Cr-Build-Id: 8727132810977714241 Cr-Build-Url: https://cr-buildbucket.appspot.com/build/8727132810977714241 Copybot-Job-Name: zephyr-main-copybot-downstream Change-Id: I89b025de50783de3c64752310a98b95546cf81b8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/zephyr/+/6112212 Tested-by: ChromeOS Prod (Robot) <[email protected]> Commit-Queue: ChromeOS Prod (Robot) <[email protected]> Bot-Commit: ChromeOS Prod (Robot) <[email protected]>
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Daniel Fuchs
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Chromeos LUCI
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Dec 30, 2024
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,25 @@ | ||
/* | ||
* Copyright (c) 2019 Steven Lemaire | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <mem.h> | ||
#include <silabs/efr32mg24.dtsi> | ||
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/ { | ||
sram0: memory@20000000 { | ||
reg = <0x20000000 DT_SIZE_K(256)>; | ||
}; | ||
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soc { | ||
compatible = "silabs,efr32mg24b210f1536im48", | ||
"silabs,efr32mg24", | ||
"silabs,efr32", | ||
"simple-bus"; | ||
}; | ||
}; | ||
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&flash0 { | ||
reg = <0x08000000 DT_SIZE_K(1536)>; | ||
}; |
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