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pre-commit: PR120888 #1896

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952bcaf
pre-commit: PR120888
fhahn Dec 22, 2024
6448dd6
pre-commit: Update
github-actions[bot] Dec 22, 2024
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7 changes: 5 additions & 2 deletions bench/abc/optimized/bacWriteVer.c.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -105,8 +105,8 @@ define void @Psr_ManWriteVerilogArray(ptr nocapture noundef %0, ptr nocapture no
br i1 %7, label %.lr.ph, label %.critedge

.lr.ph: ; preds = %6
%.not.not = icmp eq i32 %5, 0
%8 = getelementptr i8, ptr %2, i64 8
%.not.not = icmp eq i32 %5, 0
%9 = add nsw i32 %4, -1
%10 = sext i32 %3 to i64
%sext20 = sext i32 %9 to i64
Expand Down Expand Up @@ -533,25 +533,28 @@ Ptr_TypeToName.exit.i.i: ; preds = %132, %switch.lookup
%151 = add nsw i32 %Psr_BoxSignals.V.val.i.i, -3
%sext20.i.i.i = zext nneg i32 %151 to i64
%zext.i.i = zext nneg i32 %150 to i64
%.val.i56.pre69.i.i = load ptr, ptr @Psr_BoxSignals.V.2, align 8
br label %.lr.ph.split.i.i.i

.lr.ph.split.i.i.i: ; preds = %158, %.lr.ph.i54.i.i
%.val.i56.i.i = phi ptr [ %.val.i5670.i.i, %158 ], [ %.val.i56.pre69.i.i, %.lr.ph.i54.i.i ]
%indvars.iv.i55.i.i = phi i64 [ %indvars.iv.next.i58.i.i, %158 ], [ 0, %.lr.ph.i54.i.i ]
%152 = and i64 %indvars.iv.i55.i.i, 1
%.not14.i.i.i = icmp eq i64 %152, 0
br i1 %.not14.i.i.i, label %158, label %153

153: ; preds = %.lr.ph.split.i.i.i
%.val.i56.i.i = load ptr, ptr @Psr_BoxSignals.V.2, align 8
%154 = getelementptr inbounds nuw i32, ptr %.val.i56.i.i, i64 %indvars.iv.i55.i.i
%155 = load i32, ptr %154, align 4
tail call fastcc void @Psr_ManWriteVerilogSignal(ptr noundef nonnull %11, ptr noundef nonnull readonly %31, i32 noundef %155)
%156 = icmp eq i64 %indvars.iv.i55.i.i, %sext20.i.i.i
%157 = select i1 %156, ptr @.str.1, ptr @.str.2
%fputs.i57.i.i = tail call i32 @fputs(ptr nonnull %157, ptr nonnull %11)
%.val.i56.pre.i.i = load ptr, ptr @Psr_BoxSignals.V.2, align 8
br label %158

158: ; preds = %153, %.lr.ph.split.i.i.i
%.val.i5670.i.i = phi ptr [ %.val.i56.pre.i.i, %153 ], [ %.val.i56.i.i, %.lr.ph.split.i.i.i ]
%indvars.iv.next.i58.i.i = add nuw nsw i64 %indvars.iv.i55.i.i, 1
%159 = icmp eq i64 %indvars.iv.next.i58.i.i, %zext.i.i
br i1 %159, label %Psr_ManWriteVerilogMux.exit.sink.split.i.i, label %.lr.ph.split.i.i.i, !llvm.loop !4
Expand Down
5 changes: 3 additions & 2 deletions bench/abc/optimized/cutMerge.c.ll
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Expand Up @@ -70,11 +70,11 @@ define noundef ptr @Cut_CutMergeTwo2(ptr noundef %0, ptr nocapture noundef reado
br label %.loopexit.sink.split

30: ; preds = %3
%.not = icmp ult i32 %8, 268435456
br i1 %10, label %.preheader166, label %.preheader173

.preheader173: ; preds = %30
br i1 %.not, label %._crit_edge, label %.preheader172.lr.ph
%.not199 = icmp ult i32 %8, 268435456
br i1 %.not199, label %._crit_edge, label %.preheader172.lr.ph

.preheader172.lr.ph: ; preds = %.preheader173
%.promoted179 = load i32, ptr getelementptr inbounds nuw (i8, ptr @Cut_CutMergeTwo2.M, i64 8), align 8
Expand All @@ -88,6 +88,7 @@ define noundef ptr @Cut_CutMergeTwo2(ptr noundef %0, ptr nocapture noundef reado
br label %.preheader172

.preheader166: ; preds = %30
%.not = icmp ult i32 %8, 268435456
br i1 %.not, label %._crit_edge188, label %.preheader165.lr.ph

.preheader165.lr.ph: ; preds = %.preheader166
Expand Down
25 changes: 12 additions & 13 deletions bench/abseil-cpp/optimized/cord_rep_btree_navigator_test.cc.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -4371,15 +4371,14 @@ invoke.cont.lr.ph: ; preds = %entry
br label %invoke.cont

invoke.cont: ; preds = %invoke.cont.lr.ph, %for.inc
%0 = phi ptr [ null, %invoke.cont.lr.ph ], [ %5, %for.inc ]
%s.sroa.5.017 = phi ptr [ %data.coerce1, %invoke.cont.lr.ph ], [ %add.ptr.i, %for.inc ]
%s.sroa.0.016 = phi i64 [ %data.coerce0, %invoke.cont.lr.ph ], [ %sub.i, %for.inc ]
%call5.i.i.i.i.i.i41315 = phi ptr [ null, %invoke.cont.lr.ph ], [ %call5.i.i.i.i.i.i412, %for.inc ]
%.sroa.speculated.i = tail call i64 @llvm.umin.i64(i64 %s.sroa.0.016, i64 %chunk_size)
%cmp.i.i.i = icmp ult i64 %.sroa.speculated.i, 20
%spec.store.select.i.i.i = tail call i64 @llvm.umin.i64(i64 %.sroa.speculated.i, i64 4083)
%1 = add nuw nsw i64 %spec.store.select.i.i.i, 13
%len.addr.0.i.i.i = select i1 %cmp.i.i.i, i64 32, i64 %1
%0 = add nuw nsw i64 %spec.store.select.i.i.i, 13
%len.addr.0.i.i.i = select i1 %cmp.i.i.i, i64 32, i64 %0
%cmp.i.i.i.i = icmp samesign ult i64 %len.addr.0.i.i.i, 513
%conv.i.neg.i.i.i = select i1 %cmp.i.i.i.i, i64 -8, i64 -64
%conv.i.i.i.i = select i1 %cmp.i.i.i.i, i64 8, i64 64
Expand All @@ -4390,8 +4389,8 @@ invoke.cont: ; preds = %invoke.cont.lr.ph,
to label %invoke.cont2 unwind label %lpad.loopexit

invoke.cont2: ; preds = %invoke.cont
%2 = getelementptr inbounds nuw i8, ptr %call4.i.i.i2, i64 8
store i64 2, ptr %2, align 8
%1 = getelementptr inbounds nuw i8, ptr %call4.i.i.i2, i64 8
store i64 2, ptr %1, align 8
%cmp.i.i.i.i.i = icmp samesign ult i64 %and.i.i.i.i.i, 513
%.sink8.i.i.i.i.i = select i1 %cmp.i.i.i.i.i, i64 3, i64 6
%.sink.i.i.i.i.i = select i1 %cmp.i.i.i.i.i, i64 2, i64 58
Expand All @@ -4403,18 +4402,19 @@ invoke.cont2: ; preds = %invoke.cont
store i64 %.sroa.speculated.i, ptr %call4.i.i.i2, align 8
%storage.i.i = getelementptr inbounds nuw i8, ptr %call4.i.i.i2, i64 13
tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %storage.i.i, ptr align 1 %s.sroa.5.017, i64 %.sroa.speculated.i, i1 false)
%2 = load ptr, ptr %_M_finish.i.i, align 8
%3 = load ptr, ptr %_M_end_of_storage.i.i, align 8
%cmp.not.i.i = icmp eq ptr %0, %3
%cmp.not.i.i = icmp eq ptr %2, %3
br i1 %cmp.not.i.i, label %if.else.i.i, label %if.then.i.i

if.then.i.i: ; preds = %invoke.cont2
store ptr %call4.i.i.i2, ptr %0, align 8
%incdec.ptr.i.i = getelementptr inbounds nuw i8, ptr %0, i64 8
store ptr %call4.i.i.i2, ptr %2, align 8
%incdec.ptr.i.i = getelementptr inbounds nuw i8, ptr %2, i64 8
store ptr %incdec.ptr.i.i, ptr %_M_finish.i.i, align 8
br label %for.inc

if.else.i.i: ; preds = %invoke.cont2
%sub.ptr.lhs.cast.i.i.i.i.i = ptrtoint ptr %0 to i64
%sub.ptr.lhs.cast.i.i.i.i.i = ptrtoint ptr %2 to i64
%sub.ptr.rhs.cast.i.i.i.i.i = ptrtoint ptr %call5.i.i.i.i.i.i41315 to i64
%sub.ptr.sub.i.i.i.i.i = sub i64 %sub.ptr.lhs.cast.i.i.i.i.i, %sub.ptr.rhs.cast.i.i.i.i.i
%cmp.i.i.i.i3 = icmp eq i64 %sub.ptr.sub.i.i.i.i.i, 9223372036854775800
Expand Down Expand Up @@ -4467,7 +4467,6 @@ _ZNSt6vectorIPN4absl13cord_internal7CordRepESaIS3_EE17_M_realloc_insertIJS3_EEEv
br label %for.inc

for.inc: ; preds = %_ZNSt6vectorIPN4absl13cord_internal7CordRepESaIS3_EE17_M_realloc_insertIJS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_.exit.i.i, %if.then.i.i
%5 = phi ptr [ %incdec.ptr.i.i.i, %_ZNSt6vectorIPN4absl13cord_internal7CordRepESaIS3_EE17_M_realloc_insertIJS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_.exit.i.i ], [ %incdec.ptr.i.i, %if.then.i.i ]
%call5.i.i.i.i.i.i412 = phi ptr [ %call5.i.i.i.i.i.i4, %_ZNSt6vectorIPN4absl13cord_internal7CordRepESaIS3_EE17_M_realloc_insertIJS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_.exit.i.i ], [ %call5.i.i.i.i.i.i41315, %if.then.i.i ]
%add.ptr.i = getelementptr inbounds i8, ptr %s.sroa.5.017, i64 %chunk_size
%sub.i = sub i64 %s.sroa.0.016, %chunk_size
Expand All @@ -4486,12 +4485,12 @@ lpad.loopexit.split-lp: ; preds = %if.then.i.i.i.i

lpad: ; preds = %lpad.loopexit.split-lp, %lpad.loopexit
%lpad.phi = phi { ptr, i32 } [ %lpad.loopexit10, %lpad.loopexit ], [ %lpad.loopexit.split-lp11, %lpad.loopexit.split-lp ]
%6 = load ptr, ptr %agg.result, align 8
%tobool.not.i.i.i = icmp eq ptr %6, null
%5 = load ptr, ptr %agg.result, align 8
%tobool.not.i.i.i = icmp eq ptr %5, null
br i1 %tobool.not.i.i.i, label %_ZNSt6vectorIPN4absl13cord_internal7CordRepESaIS3_EED2Ev.exit, label %if.then.i.i.i

if.then.i.i.i: ; preds = %lpad
tail call void @_ZdlPv(ptr noundef nonnull %6) #32
tail call void @_ZdlPv(ptr noundef nonnull %5) #32
br label %_ZNSt6vectorIPN4absl13cord_internal7CordRepESaIS3_EED2Ev.exit

_ZNSt6vectorIPN4absl13cord_internal7CordRepESaIS3_EED2Ev.exit: ; preds = %lpad, %if.then.i.i.i
Expand Down
9 changes: 5 additions & 4 deletions bench/arrow/optimized/encode_internal_avx2.cc.ll
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Expand Up @@ -681,8 +681,8 @@ for.end: ; preds = %for.body, %entry
ret i32 %mul10
}

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define void @_ZN5arrow7compute16EncoderVarBinary17DecodeHelper_avx2EjjjRKNS0_12RowTableImplEPNS0_14KeyColumnArrayE(i32 noundef %start_row, i32 noundef %num_rows, i32 noundef %varbinary_col_id, ptr nocapture noundef nonnull readonly align 8 dereferenceable(209) %rows, ptr nocapture noundef readonly %col) local_unnamed_addr #0 align 2 {
; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: write) uwtable
define void @_ZN5arrow7compute16EncoderVarBinary17DecodeHelper_avx2EjjjRKNS0_12RowTableImplEPNS0_14KeyColumnArrayE(i32 noundef %start_row, i32 noundef %num_rows, i32 noundef %varbinary_col_id, ptr nocapture noundef nonnull readonly align 8 dereferenceable(209) %rows, ptr nocapture noundef readonly %col) local_unnamed_addr #4 align 2 {
entry:
%cmp = icmp eq i32 %varbinary_col_id, 0
%arrayidx.i.i.i.i = getelementptr inbounds nuw i8, ptr %rows, i64 160
Expand Down Expand Up @@ -825,13 +825,14 @@ if.end: ; preds = %_ZZN5arrow7compute1
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #4
declare i64 @llvm.umax.i64(i64, i64) #5

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "frame-pointer"="all" "min-legal-vector-width"="256" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="haswell" "target-features"="+avx,+avx2,+bmi,+bmi2,+cmov,+crc32,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" }
attributes #1 = { mustprogress uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="haswell" "target-features"="+avx,+avx2,+bmi,+bmi2,+cmov,+crc32,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" }
attributes #2 = { mustprogress uwtable "frame-pointer"="all" "min-legal-vector-width"="256" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="haswell" "target-features"="+avx,+avx2,+bmi,+bmi2,+cmov,+crc32,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" }
attributes #3 = { mustprogress nounwind uwtable "frame-pointer"="all" "min-legal-vector-width"="256" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="haswell" "target-features"="+avx,+avx2,+bmi,+bmi2,+cmov,+crc32,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: write) uwtable "frame-pointer"="all" "min-legal-vector-width"="256" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="haswell" "target-features"="+avx,+avx2,+bmi,+bmi2,+cmov,+crc32,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}

Expand Down
39 changes: 25 additions & 14 deletions bench/assimp/optimized/X3DImporter_Postprocess.cpp.ll
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Expand Up @@ -168,7 +168,7 @@ terminate.lpad: ; preds = %if.then
declare i32 @__cxa_atexit(ptr, ptr, ptr) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define hidden void @_ZNK6Assimp11X3DImporter40PostprocessHelper_Matrix_GlobalToCurrentEv(ptr noalias nocapture writeonly sret(%class.aiMatrix4x4t) align 4 initializes((0, 64)) %agg.result, ptr nocapture noundef nonnull readonly align 8 dereferenceable(120) %this) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
define hidden void @_ZNK6Assimp11X3DImporter40PostprocessHelper_Matrix_GlobalToCurrentEv(ptr noalias nocapture sret(%class.aiMatrix4x4t) align 4 initializes((0, 64)) %agg.result, ptr nocapture noundef nonnull readonly align 8 dereferenceable(120) %this) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
entry:
%matr = alloca %"class.std::__cxx11::list", align 8
%_M_prev.i.i.i.i.i = getelementptr inbounds nuw i8, ptr %matr, i64 8
Expand All @@ -192,7 +192,14 @@ entry:
%mNodeElementCur = getelementptr inbounds nuw i8, ptr %this, i64 96
%0 = load ptr, ptr %mNodeElementCur, align 8
%cmp.not = icmp eq ptr %0, null
br i1 %cmp.not, label %_ZNSt7__cxx114listI12aiMatrix4x4tIfESaIS2_EED2Ev.exit13, label %do.body
br i1 %cmp.not, label %if.end5.thread, label %do.body

if.end5.thread: ; preds = %entry
call void @llvm.assume(i1 true) [ "dereferenceable"(ptr %agg.result, i64 32) ]
call void @llvm.assume(i1 true) [ "dereferenceable"(ptr %a2.i, i64 32) ]
call void @llvm.assume(i1 true) [ "dereferenceable"(ptr %b2.i, i64 32) ]
call void @llvm.assume(i1 true) [ "dereferenceable"(ptr %b3.i, i64 32) ]
br label %_ZNSt7__cxx114listI12aiMatrix4x4tIfESaIS2_EED2Ev.exit13

do.body: ; preds = %entry, %if.end
%cur_node.0 = phi ptr [ %6, %if.end ], [ %0, %entry ]
Expand Down Expand Up @@ -240,6 +247,10 @@ if.end: ; preds = %_ZNSt7__cxx114listI

if.end5: ; preds = %if.end
%.pre = load ptr, ptr %matr, align 8, !noalias !7
call void @llvm.assume(i1 true) [ "dereferenceable"(ptr %agg.result, i64 32) ]
call void @llvm.assume(i1 true) [ "dereferenceable"(ptr %a2.i, i64 32) ]
call void @llvm.assume(i1 true) [ "dereferenceable"(ptr %b2.i, i64 32) ]
call void @llvm.assume(i1 true) [ "dereferenceable"(ptr %b3.i, i64 32) ]
%cmp.i.i.i.not52 = icmp eq ptr %matr, %.pre
br i1 %cmp.i.i.i.not52, label %_ZNSt7__cxx114listI12aiMatrix4x4tIfESaIS2_EED2Ev.exit13, label %invoke.cont10.lr.ph

Expand Down Expand Up @@ -400,7 +411,7 @@ while.body.i.i.i10: ; preds = %for.end, %while.bod
%cmp.not.i.i.i12 = icmp eq ptr %87, %matr
br i1 %cmp.not.i.i.i12, label %_ZNSt7__cxx114listI12aiMatrix4x4tIfESaIS2_EED2Ev.exit13, label %while.body.i.i.i10, !llvm.loop !4

_ZNSt7__cxx114listI12aiMatrix4x4tIfESaIS2_EED2Ev.exit13: ; preds = %while.body.i.i.i10, %entry, %if.end5
_ZNSt7__cxx114listI12aiMatrix4x4tIfESaIS2_EED2Ev.exit13: ; preds = %while.body.i.i.i10, %if.end5, %if.end5.thread
ret void
}

Expand Down Expand Up @@ -4801,23 +4812,23 @@ entry:
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #18

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)
declare void @llvm.assume(i1 noundef) #19

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #19
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #20

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #19
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #20

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #20
declare i64 @llvm.umax.i64(i64, i64) #21

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #20

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)
declare void @llvm.assume(i1 noundef) #21
declare i64 @llvm.umin.i64(i64, i64) #21

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #20
declare i32 @llvm.umin.i32(i32, i32) #21

attributes #0 = { mustprogress nounwind uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind }
Expand All @@ -4838,9 +4849,9 @@ attributes #15 = { noreturn "frame-pointer"="all" "no-trapping-math"="true" "sta
attributes #16 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #17 = { nofree nounwind uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #18 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #19 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #20 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #21 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
attributes #19 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
attributes #20 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #21 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #22 = { noreturn nounwind }
attributes #23 = { builtin allocsize(0) }
attributes #24 = { nounwind }
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