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feat(docs): update docs

See merge request espressif/esp-thread-br!132
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chshu committed Aug 7, 2024
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19 changes: 13 additions & 6 deletions README.md
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Expand Up @@ -32,25 +32,32 @@ The two SoCs are connected with following interfaces:

The SDK also supports manually connecting an ESP32-H2 RCP to an ESP32 series Wi-Fi SoC.

For standalone modules, we recommend the [ot_br](https://github.com/espressif/esp-idf/tree/master/examples/openthread/ot_br) example in esp-idf as a quick start.

#### Connect an ESP32-H2 RCP to an ESP32 series Wi-Fi SoC using UART:
ESP32 pin | ESP32-H2 pin
--------------------|-------------
GND | G
GPIO17 (UART RX) | TX
GPIO18 (UART TX) | RX
GPIO7 | RST
GPIO8 | GPIO9 (BOOT)

#### Connect an ESP32-H2 RCP to an ESP32 series Wi-Fi SoC using SPI:
ESP32 pin | ESP32-H2 pin
--------------------|-------------
GND | G
GPIO7 | RST
GPIO8 (SPI INTR) | GPIO9 (BOOT)
GPIO10 (SPI CS) | GPIO2
GPIO11 (SPI MOSI) | GPIO3
GPIO12 (SPI CLK) | GPIO0
GPIO13 (SPI MISO) | GPIO1

Note that the SPI GPIOs are optional, if the UART is selected for communication.

The following image shows an example connection between ESP32 DevKitC and ESP32-H2 DevKitC:

![br_standalone](docs/images/thread-border-router-esp32-esp32h2.jpg)
Note that:
1. The GPIO17 and GPIO18 on ESP32-S3 have different driver current([refer to ESP32-S3 TRM, Chapter 6.12](https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf)). If ESP32-S3 is used as the host, please change the UART RX/TX GPIOs to GPIO4 and GPIO5 which are recommended.

In this setup, only UART interface is connected, so it doesn't support RCP Update or RF Coexistence features. You can refer to [ot_br](https://github.com/espressif/esp-idf/tree/master/examples/openthread/ot_br) example in esp-idf as a quick start.
2. The configure `ESP_CONSOLE_USB_SERIAL_JTAG` is enabled by default, please connect the USB port of the ESP32 series Wi-Fi SoC to host.

## Ethernet based Thread Border Router

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1 change: 1 addition & 0 deletions docs/en/index.rst
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Expand Up @@ -33,3 +33,4 @@ Table of Contents
dev-guide/index
codelab/index
api-reference/index
qa
36 changes: 36 additions & 0 deletions docs/en/qa.rst
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******
5. FAQ
******

Q1: Why can't I access the host from the BR device using the `ping` command?
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

A1: The Espressif Thread Border Router (BR) framework integrates the Openthread stack and the Wi-Fi stack as a single network interfaces (netif) connected to lwIP. Both Openthread and Wi-Fi addresses are managed by LwIP.

.. code-block::
------- ------------
| | | lwIP |
| H | | ----- |
| O | | | | |
| S | |-↑-↓---↑--|
| T | <---BR sends the Ping Request to Host -------- | | | | |
| | ----Host sends the Ping Reply back to BR-------->|-| | |--|<------Ping command is
| | | WiFi| OT | implemented at the OT layer
| | | | |
------- ------------
LwIP serves as the upper layer for Openthread and Wi-Fi, forwarding packets from each netif. The ping command you used operates at the Openthread stack layer. In our BR setup, ping packets must be sent to the LWIP layer, which then forwards them to the Wi-Fi interface.

Here's how it works in your scenario:

1. The ping command initiates at the Openthread layer. The ping packet is sent to lwIP for forwarding.
2. LwIP recognizes the destination address on the Wi-Fi netif then forwards the packets to the Wi-Fi interface.
3. The host receives the packets and sends a reply to the BR.
4. The BR receives the reply packets on the Wi-Fi interface.The BR pushes the reply packets to lwIP for processing.
5. LwIP finds the destination address is assigned to the BR (Openthread layer assigns the OMR address to lwIP). LwIP does not need to forward the packets back to the Openthread layer.

As a result, the Openthread layer shows the ping reply as lost, even though the BR receives the reply packets.

To resolve this (i.e., to see a successful ping result from BR to Host), you can implement a ping command at the lwIP layer. Using this command, you can ping the Host directly from lwIP.
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