tty: serial: Add driver for the PlayStation 2 EE UART/SIO

UART/SIO serial communication support for the Emotion Engine (EE). Only polling mode is currently supported. Signed-off-by: Xavier Brassoud <[email protected]> Signed-off-by: Fredrik Noring <[email protected]>
frno7 · Jan 12, 2025 · 515fa87 · 515fa87
1 parent f30d2c4
commit 515fa87
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Showing 8 changed files with 492 additions and 2 deletions.
diff --git a/arch/mips/boot/compressed/dbg.c b/arch/mips/boot/compressed/dbg.c
@@ -17,6 +17,7 @@
 
 #include <asm/mach-ps2/gs.h>
 #include <asm/mach-ps2/gs-registers.h>
+#include <asm/mach-ps2/sio-registers.h>
 #include <uapi/asm/gif.h>
 
 #define D2_CHCR		0x1000a000	/* Channel 2 control */
@@ -295,6 +296,12 @@ void wrlX(u32 value, unsigned long addr)
 	wmb();
 }
 
+static inline void wrb(u8 value, unsigned long addr)
+{
+	__raw_writeb(value, (void __iomem *)KSEG1ADDR(addr));
+	wmb();
+}
+
 static inline void wrl(u32 value, unsigned long addr)
 {
 	__raw_writel(value, (void __iomem *)KSEG1ADDR(addr));
@@ -693,6 +700,9 @@ void putc(char c)
 	if (!IS_ENABLED(CONFIG_EARLY_PRINTK))
 		return;
 
+	if (IS_ENABLED(CONFIG_SERIAL_PS2_UART_CONSOLE))
+		wrb(c, SIO_TXFIFO);	/* Send to EE UART */
+
 	if (!initialized) {
 		set_res();
 		set_env();

diff --git a/arch/mips/configs/ps2_defconfig b/arch/mips/configs/ps2_defconfig
@@ -1192,7 +1192,8 @@ CONFIG_DEVKMEM=y
 # Serial drivers
 #
 # CONFIG_SERIAL_8250 is not set
-
+CONFIG_SERIAL_PS2_UART=y
+CONFIG_SERIAL_PS2_UART_CONSOLE=y
 #
 # Non-8250 serial port support
 #
@@ -2696,7 +2697,7 @@ CONFIG_UBSAN_ALIGNMENT=y
 CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="video=AV-MULTI-OUT:1920x1080@50"
+CONFIG_CMDLINE="video=AV-MULTI-OUT:1920x1080@50 console=tty0 console=tty1"
 # CONFIG_CMDLINE_OVERRIDE is not set
 CONFIG_DEBUG_ZBOOT=y
 # CONFIG_SPINLOCK_TEST is not set

diff --git a/arch/mips/include/asm/mach-ps2/sio-registers.h b/arch/mips/include/asm/mach-ps2/sio-registers.h
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * PlayStation 2 serial input/output (SIO) registers
+ */
+
+#ifndef __ASM_MACH_PS2_SIO_REGISTERS_H
+#define __ASM_MACH_PS2_SIO_REGISTERS_H
+
+/**
+ * DOC: Serial input/output (SIO) registers
+ *
+ * Most of these are based off of Toshiba documentation for the TX49 and the
+ * TX79 companion chip. However, looking at the kernel SIOP (Debug) exception
+ * handler, it looks like some registers are borrowed from the TX7901 UART
+ * (0x1000f110 or LSR, in particular). I'm still trying to find the correct
+ * register names and values.
+ */
+
+#define SIO_LCR		  0x1000f100 /* Line control register */
+#define SIO_LCR_UMODE_8BIT	0x00 /* UART mode */
+#define SIO_LCR_UMODE_7BIT	0x01
+#define SIO_LCR_USBL_1BIT	0x00 /* UART stop bit length */
+#define SIO_LCR_USBL_2BITS	0x01
+#define SIO_LCR_UPEN_OFF	0x00 /* UART parity enable */
+#define SIO_LCR_UPEN_ON		0x01
+#define SIO_LCR_UEPS_ODD	0x00 /* UART even parity select */
+#define SIO_LCR_UEPS_EVEN	0x01
+
+#define SIO_LSR		  0x1000f110 /* Line status register */
+#define SIO_LSR_DR		0x01 /* Data ready (not tested) */
+#define SIO_LSR_OE		0x02 /* Overrun error */
+#define SIO_LSR_PE		0x04 /* Parity error */
+#define SIO_LSR_FE		0x08 /* Framing error */
+
+#define SIO_IER		  0x1000f120 /* Interrupt enable register */
+#define SIO_IER_ERDAI		0x01 /* Enable received data available interrupt */
+#define SIO_IER_ELSI		0x04 /* Enable line status interrupt */
+
+#define SIO_ISR		  0x1000f130 /* Interrupt status register (?) */
+#define SIO_ISR_RX_DATA		0x01
+#define SIO_ISR_TX_EMPTY	0x02
+#define SIO_ISR_RX_ERROR	0x04
+
+#define SIO_FCR		  0x1000f140 /* FIFO control register */
+#define SIO_FCR_FRSTE		0x01 /* FIFO reset enable */
+#define SIO_FCR_RFRST		0x02 /* RX FIFO reset */
+#define SIO_FCR_TFRST		0x04 /* TX FIFO reset */
+
+#define SIO_BGR		  0x1000f150 /* Baud rate control register */
+
+#define SIO_TXFIFO	  0x1000f180 /* Transmit FIFO */
+#define SIO_RXFIFO	  0x1000f1c0 /* Receive FIFO */
+
+#endif /* __ASM_MACH_PS2_SIO_REGISTERS_H */
diff --git a/arch/mips/ps2/prom.c b/arch/mips/ps2/prom.c
@@ -17,6 +17,7 @@
 #include <asm/sections.h>
 
 #include <asm/mach-ps2/gs.h>
+#include <asm/mach-ps2/sio-registers.h>
 
 #include <uapi/asm/gif.h>
 
@@ -301,6 +302,12 @@ static inline u32 rdl(unsigned long addr)
 	return __raw_readl((void __iomem *)KSEG1ADDR(addr));
 }
 
+static inline void wrb(u8 value, unsigned long addr)
+{
+	__raw_writeb(value, (void __iomem *)KSEG1ADDR(addr));
+	wmb();
+}
+
 static inline void wrl(u32 value, unsigned long addr)
 {
 	__raw_writel(value, (void __iomem *)KSEG1ADDR(addr));
@@ -429,6 +436,9 @@ void prom_putchar(char c)
 	if (!IS_ENABLED(CONFIG_EARLY_PRINTK))
 		return;
 
+	if (IS_ENABLED(CONFIG_SERIAL_PS2_UART_CONSOLE))
+		wrb(c, SIO_TXFIFO);	/* Send to EE UART */
+
 	if (c == '\r') {
 		col = 0;
 		return;

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
@@ -1573,6 +1573,25 @@ config SERIAL_MILBEAUT_USIO_CONSOLE
 	  receives all kernel messages and warnings and which allows logins in
 	  single user mode).
 
+config SERIAL_PS2_UART
+	tristate "PS2 serial port"
+	depends on SONY_PS2
+	select SERIAL_CORE
+	default n
+	help
+	  Driver for the PlayStation 2 UART/SIO port. You can see the output
+	  with a serial cable connected to the internal serial pins of the
+	  PlayStation 2. To use it as system console, specify the kernel
+	  parameter "console=ttyS0".
+
+config SERIAL_PS2_UART_CONSOLE
+	bool "PS2 serial port console"
+	depends on SERIAL_PS2_UART=y
+	select SERIAL_CORE_CONSOLE
+	select SERIAL_EARLYCON
+	help
+	  Enable the PlayStation 2 UART/SIO port for the system console.
+
 endmenu
 
 config SERIAL_MCTRL_GPIO

diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_SERIAL_OWL)	+= owl-uart.o
 obj-$(CONFIG_SERIAL_RDA)	+= rda-uart.o
 obj-$(CONFIG_SERIAL_MILBEAUT_USIO) += milbeaut_usio.o
 obj-$(CONFIG_SERIAL_SIFIVE)	+= sifive.o
+obj-$(CONFIG_SERIAL_PS2_UART)	+= ps2_uart.o
 
 # GPIOLIB helpers for modem control lines
 obj-$(CONFIG_SERIAL_MCTRL_GPIO)	+= serial_mctrl_gpio.o