Add PowerPC 64-bit DWARF register mappings

gimli-rs · Jan 11, 2024 · bc7d6c4 · bc7d6c4
1 parent ee0262a
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diff --git a/crates/examples/src/bin/dwarfdump.rs b/crates/examples/src/bin/dwarfdump.rs
@@ -746,6 +746,7 @@ fn dump_eh_frame<R: Reader, W: Write>(
         None
     }
     let arch_register_name = match file.architecture() {
+        object::Architecture::PowerPc64 => gimli::PowerPc64::register_name,
         object::Architecture::Arm | object::Architecture::Aarch64 => gimli::Arm::register_name,
         object::Architecture::I386 => gimli::X86::register_name,
         object::Architecture::X86_64 => gimli::X86_64::register_name,

diff --git a/src/arch.rs b/src/arch.rs
@@ -820,6 +820,131 @@ registers!(X86_64, {
     K7 = (125, "k7"),
 });
 
+/// PowerPC 64bit
+///
+/// See [64-bit ELF ABI Specification for OpenPOWER Architecture](https://openpowerfoundation.org/specifications/64bitelfabi/).
+#[derive(Debug, Clone, Copy)]
+pub struct PowerPc64;
+
+registers!(PowerPc64, {
+    R0 = (0, "R0"),
+    R1 = (1, "R1"),
+    R2 = (2, "R2"),
+    R3 = (3, "R3"),
+    R4 = (4, "R4"),
+    R5 = (5, "R5"),
+    R6 = (6, "R6"),
+    R7 = (7, "R7"),
+    R8 = (8, "R8"),
+    R9 = (9, "R9"),
+    R10 = (10, "R10"),
+    R11 = (11, "R11"),
+    R12 = (12, "R12"),
+    R13 = (13, "R13"),
+    R14 = (14, "R14"),
+    R15 = (15, "R15"),
+    R16 = (16, "R16"),
+    R17 = (17, "R17"),
+    R18 = (18, "R18"),
+    R19 = (19, "R19"),
+    R20 = (20, "R20"),
+    R21 = (21, "R21"),
+    R22 = (22, "R22"),
+    R23 = (23, "R23"),
+    R24 = (24, "R24"),
+    R25 = (25, "R25"),
+    R26 = (26, "R26"),
+    R27 = (27, "R27"),
+    R28 = (28, "R28"),
+    R29 = (29, "R29"),
+    R30 = (30, "R30"),
+    R31 = (31, "R31"),
+
+    F0 = (32, "F0"),
+    F1 = (33, "F1"),
+    F2 = (34, "F2"),
+    F3 = (35, "F3"),
+    F4 = (36, "F4"),
+    F5 = (37, "F5"),
+    F6 = (38, "F6"),
+    F7 = (39, "F7"),
+    F8 = (40, "F8"),
+    F9 = (41, "F9"),
+    F10 = (42, "F10"),
+    F11 = (43, "F11"),
+    F12 = (44, "F12"),
+    F13 = (45, "F13"),
+    F14 = (46, "F14"),
+    F15 = (47, "F15"),
+    F16 = (48, "F16"),
+    F17 = (49, "F17"),
+    F18 = (50, "F18"),
+    F19 = (51, "F19"),
+    F20 = (52, "F20"),
+    F21 = (53, "F21"),
+    F22 = (54, "F22"),
+    F23 = (55, "F23"),
+    F24 = (56, "F24"),
+    F25 = (57, "F25"),
+    F26 = (58, "F26"),
+    F27 = (59, "F27"),
+    F28 = (60, "F28"),
+    F29 = (61, "F29"),
+    F30 = (62, "F30"),
+    F31 = (63, "F31"),
+
+    LR = (65, "LR"),
+    CTR = (66, "CTR"),
+
+    CR0 = (68, "CR0"),
+    CR1 = (69, "CR1"),
+    CR2 = (70, "CR2"),
+    CR3 = (71, "CR3"),
+    CR4 = (72, "CR4"),
+    CR5 = (73, "CR5"),
+    CR6 = (74, "CR6"),
+    CR7 = (75, "CR7"),
+    XR = (76, "XER"),
+
+    VR0 = (77, "VR0"),
+    VR1 = (78, "VR1"),
+    VR2 = (79, "VR2"),
+    VR3 = (80, "VR3"),
+    VR4 = (81, "VR4"),
+    VR5 = (82, "VR5"),
+    VR6 = (83, "VR6"),
+    VR7 = (84, "VR7"),
+    VR8 = (85, "VR8"),
+    VR9 = (86, "VR9"),
+    VR10 = (87, "VR10"),
+    VR11 = (88, "VR11"),
+    VR12 = (89, "VR12"),
+    VR13 = (90, "VR13"),
+    VR14 = (91, "VR14"),
+    VR15 = (92, "VR15"),
+    VR16 = (93, "VR16"),
+    VR17 = (94, "VR17"),
+    VR18 = (95, "VR18"),
+    VR19 = (96, "VR19"),
+    VR20 = (97, "VR20"),
+    VR21 = (98, "VR21"),
+    VR22 = (99, "VR22"),
+    VR23 = (100, "VR23"),
+    VR24 = (101, "VR24"),
+    VR25 = (102, "VR25"),
+    VR26 = (103, "VR26"),
+    VR27 = (104, "VR27"),
+    VR28 = (105, "VR28"),
+    VR29 = (106, "VR29"),
+    VR30 = (107, "VR30"),
+    VR31 = (108, "VR31"),
+
+    VSCR = (110, "VSCR"),
+    TFHAR = (114, "TFHAR"),
+    FTIAR = (115, "TFIAR"),
+    TEXASR = (116, "TEXASR"),
+});
+
 #[cfg(test)]
 mod tests {
 
@@ -836,4 +961,18 @@ mod tests {
             assert!(names.insert(name));
         }
     }
+
+    #[test]
+    #[cfg(feature = "std")]
+    fn test_power64_registers() {
+        use super::*;
+        use std::collections::HashSet;
+
+        let mut names = HashSet::new();
+        for n in (0..=63).chain(68..=75).chain(77..=108) {
+            let name = PowerPc64::register_name(Register(n))
+                .unwrap_or_else(|| panic!("Register {} should have a name.", n));
+            assert!(names.insert(name));
+        }
+    }
 }