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rockchip64-edge: disable hantro g1 h264 decoder on rk356x
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patch/kernel/archive/rockchip64-6.10/media-0003-rk3568-disable-hantro-h264.patch
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,63 @@ | ||
| diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c | ||
| index 34b123daf..802a5dca1 100644 | ||
| --- a/drivers/media/platform/verisilicon/hantro_drv.c | ||
| +++ b/drivers/media/platform/verisilicon/hantro_drv.c | ||
| @@ -721,7 +721,6 @@ static const struct of_device_id of_hantro_match[] = { | ||
| { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, }, | ||
| { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, }, | ||
| { .compatible = "rockchip,rk3568-vepu", .data = &rk3568_vepu_variant, }, | ||
| - { .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, }, | ||
| { .compatible = "rockchip,rk3588-av1-vpu", .data = &rk3588_vpu981_variant, }, | ||
| #endif | ||
| #ifdef CONFIG_VIDEO_HANTRO_IMX8M | ||
| diff --git a/drivers/media/platform/verisilicon/hantro_hw.h b/drivers/media/platform/verisilicon/hantro_hw.h | ||
| index 7737320cc..5aa048ef3 100644 | ||
| --- a/drivers/media/platform/verisilicon/hantro_hw.h | ||
| +++ b/drivers/media/platform/verisilicon/hantro_hw.h | ||
| @@ -404,7 +404,6 @@ extern const struct hantro_variant rk3288_vpu_variant; | ||
| extern const struct hantro_variant rk3328_vpu_variant; | ||
| extern const struct hantro_variant rk3399_vpu_variant; | ||
| extern const struct hantro_variant rk3568_vepu_variant; | ||
| -extern const struct hantro_variant rk3568_vpu_variant; | ||
| extern const struct hantro_variant rk3588_vpu981_variant; | ||
| extern const struct hantro_variant sama5d4_vdec_variant; | ||
| extern const struct hantro_variant sunxi_vpu_variant; | ||
| diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c | ||
| index f97527670..5707dce4b 100644 | ||
| --- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c | ||
| +++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c | ||
| @@ -719,10 +719,9 @@ const struct hantro_variant rk3288_vpu_variant = { | ||
|
|
||
| const struct hantro_variant rk3328_vpu_variant = { | ||
| .dec_offset = 0x400, | ||
| - .dec_fmts = rockchip_vdpu2_dec_fmts, | ||
| - .num_dec_fmts = ARRAY_SIZE(rockchip_vdpu2_dec_fmts), | ||
| - .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | | ||
| - HANTRO_H264_DECODER, | ||
| + .dec_fmts = rk3399_vpu_dec_fmts, | ||
| + .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts), | ||
| + .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER, | ||
| .codec_ops = rk3399_vpu_codec_ops, | ||
| .irqs = rockchip_vdpu2_irqs, | ||
| .num_irqs = ARRAY_SIZE(rockchip_vdpu2_irqs), | ||
| @@ -766,20 +765,6 @@ const struct hantro_variant rk3568_vepu_variant = { | ||
| .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names) | ||
| }; | ||
|
|
||
| -const struct hantro_variant rk3568_vpu_variant = { | ||
| - .dec_offset = 0x400, | ||
| - .dec_fmts = rockchip_vdpu2_dec_fmts, | ||
| - .num_dec_fmts = ARRAY_SIZE(rockchip_vdpu2_dec_fmts), | ||
| - .codec = HANTRO_MPEG2_DECODER | | ||
| - HANTRO_VP8_DECODER | HANTRO_H264_DECODER, | ||
| - .codec_ops = rk3399_vpu_codec_ops, | ||
| - .irqs = rockchip_vdpu2_irqs, | ||
| - .num_irqs = ARRAY_SIZE(rockchip_vdpu2_irqs), | ||
| - .init = rockchip_vpu_hw_init, | ||
| - .clk_names = rockchip_vpu_clk_names, | ||
| - .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names) | ||
| -}; | ||
| - | ||
| const struct hantro_variant px30_vpu_variant = { | ||
| .enc_offset = 0x0, | ||
| .enc_fmts = rockchip_vpu_enc_fmts, |