• Designed a 1 Bit ALU using Cadence Virtuoso 130 nm node technology (NCSU Library). • Mirrored XOR circuits were used for optimizing the Full ADDER/SUBTRACTOR design and layout. • Created standard cells for AND, OR, ADDER/SUBTRACTOR, and 4 x1 MUX. Verified DRC/LVS.
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• Designed a 1 Bit ALU using Cadence Virtuoso which implements two logical operations AND, OR and two arithmetic operations ADDITION and SUBTRACTION. These operations were selected using a 4 x 1 MUX. • Mirrored XOR circuits were used for optimizing the Full ADDER/SUBTRACTOR design and layout. • Created standard cells for each function and used t…
gokulbalagopal/Full-Custom-Design-and-Layout-of-One-Bit-ALU-using-Cadence-Virtuoso
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• Designed a 1 Bit ALU using Cadence Virtuoso which implements two logical operations AND, OR and two arithmetic operations ADDITION and SUBTRACTION. These operations were selected using a 4 x 1 MUX. • Mirrored XOR circuits were used for optimizing the Full ADDER/SUBTRACTOR design and layout. • Created standard cells for each function and used t…
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