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Removed unused GlobalAvergaPooling internal code.
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PiperOrigin-RevId: 689475112
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Misha Gutman authored and xnnpack-bot committed Oct 24, 2024
1 parent 9073962 commit 79a0d9c
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Showing 231 changed files with 480 additions and 79,479 deletions.
1 change: 0 additions & 1 deletion BUILD.bazel
Original file line number Diff line number Diff line change
Expand Up @@ -221,7 +221,6 @@ MICROKERNEL_HDRS = [
"src/xnnpack/conv.h",
"src/xnnpack/dwconv.h",
"src/xnnpack/fill.h",
"src/xnnpack/gavgpool.h",
"src/xnnpack/gemm.h",
"src/xnnpack/ibilinear.h",
"src/xnnpack/igemm.h",
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7 changes: 0 additions & 7 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -507,7 +507,6 @@ SET(XNNPACK_SRCS
src/configs/dwconv-config.c
src/configs/dwconv2d-chw-config.c
src/configs/experiments-config.c
src/configs/gavgpool-config.c
src/configs/gemm-config.c
src/configs/ibilinear-chw-config.c
src/configs/ibilinear-config.c
Expand Down Expand Up @@ -1475,7 +1474,6 @@ IF(XNNPACK_BUILD_TESTS)
f16-conv-hwc2chw
f16-f32acc-rdsum
f16-f32acc-rsum
f16-gavgpool-minmax
f16-ibilinear-chw
f16-ibilinear
f16-raddstoreexpminusmax
Expand All @@ -1486,7 +1484,6 @@ IF(XNNPACK_BUILD_TESTS)
f16-vmulcaddc-minmax
f32-conv-hwc
f32-conv-hwc2chw
f32-gavgpool-minmax
f32-ibilinear-chw
f32-ibilinear
f32-raddexpminusmax
Expand All @@ -1503,16 +1500,12 @@ IF(XNNPACK_BUILD_TESTS)
f32-vscaleextexp
indirection
packing
qs8-gavgpool-minmax-fp32
qs8-gavgpool-minmax-rndnu
qs8-rdsum-minmax-fp32
qu8-rdsum
qs8-rsum
qu8-rsum
qs8-vhswish
qs8-vlrelu
qu8-gavgpool-minmax-fp32
qu8-gavgpool-minmax-rndnu
qu8-vhswish
qu8-vlrelu
s8-ibilinear
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1 change: 0 additions & 1 deletion build_srcs.bzl
Original file line number Diff line number Diff line change
Expand Up @@ -108,7 +108,6 @@ XNNPACK_SRCS = [
"src/configs/conv-hwc2chw-config.c",
"src/configs/dwconv-config.c",
"src/configs/dwconv2d-chw-config.c",
"src/configs/gavgpool-config.c",
"src/configs/gemm-config.c",
"src/configs/ibilinear-chw-config.c",
"src/configs/ibilinear-config.c",
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8 changes: 0 additions & 8 deletions cmake/gen/f16c_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -15,8 +15,6 @@ SET(PROD_F16C_MICROKERNEL_SRCS
src/f16-f32-vcvt/gen/f16-f32-vcvt-f16c-u16.c
src/f16-f32acc-rdsum/gen/f16-f32acc-rdsum-7p7x-f16c-c32.c
src/f16-f32acc-rsum/gen/f16-f32acc-rsum-f16c-u32-acc4.c
src/f16-gavgpool/gen/f16-gavgpool-7p7x-minmax-f16c-c8.c
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-f16c-c8.c
src/f16-maxpool/f16-maxpool-9p8x-minmax-f16c-c8.c
src/f16-rminmax/f16-rmax-f16c-u32.c
src/f16-vbinary/gen/f16-vadd-f16c-u16.c
Expand Down Expand Up @@ -60,12 +58,6 @@ SET(NON_PROD_F16C_MICROKERNEL_SRCS
src/f16-f32acc-rsum/gen/f16-f32acc-rsum-f16c-u16-acc2.c
src/f16-f32acc-rsum/gen/f16-f32acc-rsum-f16c-u24-acc3.c
src/f16-f32acc-rsum/gen/f16-f32acc-rsum-f16c-u32-acc2.c
src/f16-gavgpool/gen/f16-gavgpool-7p7x-minmax-f16c-c16.c
src/f16-gavgpool/gen/f16-gavgpool-7p7x-minmax-f16c-c24.c
src/f16-gavgpool/gen/f16-gavgpool-7p7x-minmax-f16c-c32.c
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-f16c-c16.c
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-f16c-c24.c
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-f16c-c32.c
src/f16-vbinary/gen/f16-vadd-f16c-u8.c
src/f16-vbinary/gen/f16-vaddc-f16c-u8.c
src/f16-vbinary/gen/f16-vdiv-f16c-u16.c
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34 changes: 0 additions & 34 deletions cmake/gen/neon_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -27,8 +27,6 @@ SET(PROD_NEON_MICROKERNEL_SRCS
src/f32-dwconv2d-chw/gen/f32-dwconv2d-chw-5x5p2-minmax-neon-1x4.c
src/f32-dwconv2d-chw/gen/f32-dwconv2d-chw-5x5s2p2-minmax-neon-1x4.c
src/f32-f16-vcvt/gen/f32-f16-vcvt-neon-u8.c
src/f32-gavgpool/f32-gavgpool-7p7x-minmax-neon-c4.c
src/f32-gavgpool/f32-gavgpool-7x-minmax-neon-c4.c
src/f32-gemm/gen/f32-gemm-1x8-minmax-neon-lane-ld64.c
src/f32-gemm/gen/f32-gemm-4x2-minmax-neon-lane-ld64.c
src/f32-gemm/gen/f32-gemm-4x8-minmax-neon-lane-ld128.c
Expand Down Expand Up @@ -100,8 +98,6 @@ SET(PROD_NEON_MICROKERNEL_SRCS
src/qs8-dwconv/gen/qs8-dwconv-25p8c-minmax-rndnu-neon-mla8-ld64.c
src/qs8-dwconv/gen/qs8-dwconv-25p16c-minmax-rndnu-neon-mla8-ld64.c
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-neon-u32.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-rndnu-neon-c8.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-rndnu-neon-c8.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-3p16c-minmax-fp32-neon-mla8-ld128.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-9p16c-minmax-fp32-neon-mla8-ld64.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-25p8c-minmax-fp32-neon-mla8-ld64.c
Expand All @@ -125,8 +121,6 @@ SET(PROD_NEON_MICROKERNEL_SRCS
src/qu8-dwconv/gen/qu8-dwconv-9p16c-minmax-rndnu-neon-mul8.c
src/qu8-dwconv/gen/qu8-dwconv-25p8c-minmax-rndnu-neon-mul8.c
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-neon-u32.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-rndnu-neon-c8.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-rndnu-neon-c8.c
src/qu8-gemm/gen/qu8-gemm-1x8-minmax-rndnu-neon-mlal-lane.c
src/qu8-gemm/gen/qu8-gemm-1x16-minmax-rndnu-neon-mlal-lane.c
src/qu8-gemm/gen/qu8-gemm-3x8-minmax-rndnu-neon-mlal-lane.c
Expand Down Expand Up @@ -571,20 +565,6 @@ SET(NON_PROD_NEON_MICROKERNEL_SRCS
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-neon-u8.c
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-neon-u16.c
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-neon-u24.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-neon-c8.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-neon-c16.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-neon-c24.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-neon-c32.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-rndnu-neon-c16.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-rndnu-neon-c24.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-rndnu-neon-c32.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-neon-c8.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-neon-c16.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-neon-c24.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-neon-c32.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-rndnu-neon-c16.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-rndnu-neon-c24.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-rndnu-neon-c32.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-3p8c-minmax-fp32-neon-mla8-ld64.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-3p16c-minmax-fp32-neon-mla8-ld64.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-4p8c-minmax-fp32-neon-mla8-ld64.c
Expand Down Expand Up @@ -785,20 +765,6 @@ SET(NON_PROD_NEON_MICROKERNEL_SRCS
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-neon-u8.c
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-neon-u16.c
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-neon-u24.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-neon-c8.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-neon-c16.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-neon-c24.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-neon-c32.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-rndnu-neon-c16.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-rndnu-neon-c24.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-rndnu-neon-c32.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-neon-c8.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-neon-c16.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-neon-c24.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-neon-c32.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-rndnu-neon-c16.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-rndnu-neon-c24.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-rndnu-neon-c32.c
src/qu8-gemm/gen/qu8-gemm-1x8-minmax-fp32-neon-mlal-lane.c
src/qu8-gemm/gen/qu8-gemm-1x16-minmax-fp32-neon-mlal-lane.c
src/qu8-gemm/gen/qu8-gemm-2x8-minmax-rndnu-neon-mlal-lane.c
Expand Down
8 changes: 0 additions & 8 deletions cmake/gen/neonfp16arith_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -24,8 +24,6 @@ SET(PROD_NEONFP16ARITH_MICROKERNEL_SRCS
src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5s2p2-minmax-neonfp16arith-1x8.c
src/f16-f32acc-rdsum/gen/f16-f32acc-rdsum-7p7x-minmax-neonfp16arith-c16.c
src/f16-f32acc-rsum/gen/f16-f32acc-rsum-neonfp16arith-u32-acc4.c
src/f16-gavgpool/gen/f16-gavgpool-7p7x-minmax-neonfp16arith-c8.c
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-neonfp16arith-c8.c
src/f16-gemm/gen/f16-gemm-1x8-minmax-neonfp16arith-ld64.c
src/f16-gemm/gen/f16-gemm-1x16-minmax-neonfp16arith-ld64.c
src/f16-gemm/gen/f16-gemm-6x8-minmax-neonfp16arith-ld64.c
Expand Down Expand Up @@ -170,12 +168,6 @@ SET(NON_PROD_NEONFP16ARITH_MICROKERNEL_SRCS
src/f16-f32acc-rsum/gen/f16-f32acc-rsum-neonfp16arith-u16-acc2.c
src/f16-f32acc-rsum/gen/f16-f32acc-rsum-neonfp16arith-u24-acc3.c
src/f16-f32acc-rsum/gen/f16-f32acc-rsum-neonfp16arith-u32-acc2.c
src/f16-gavgpool/gen/f16-gavgpool-7p7x-minmax-neonfp16arith-c16.c
src/f16-gavgpool/gen/f16-gavgpool-7p7x-minmax-neonfp16arith-c24.c
src/f16-gavgpool/gen/f16-gavgpool-7p7x-minmax-neonfp16arith-c32.c
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-neonfp16arith-c16.c
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-neonfp16arith-c24.c
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-neonfp16arith-c32.c
src/f16-gemm/gen/f16-gemm-4x8-minmax-neonfp16arith-ld64.c
src/f16-gemm/gen/f16-gemm-4x16-minmax-neonfp16arith-ld64.c
src/f16-gemm/gen/f16-gemm-8x8-minmax-neonfp16arith-ld64.c
Expand Down
16 changes: 0 additions & 16 deletions cmake/gen/neonv8_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -53,14 +53,6 @@ SET(NON_PROD_NEONV8_MICROKERNEL_SRCS
src/qs8-dwconv/gen/qs8-dwconv-25p8c-minmax-fp32-neonv8-mul16.c
src/qs8-dwconv/gen/qs8-dwconv-25p16c-minmax-fp32-neonv8-mul16.c
src/qs8-dwconv/gen/qs8-dwconv-25p32c-minmax-fp32-neonv8-mul16.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-neonv8-c8.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-neonv8-c16.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-neonv8-c24.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-neonv8-c32.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-neonv8-c8.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-neonv8-c16.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-neonv8-c24.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-neonv8-c32.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-3p8c-minmax-fp32-neonv8-mla8-ld64.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-3p16c-minmax-fp32-neonv8-mla8-ld64.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-5f5m5l8c8s8r-minmax-fp32-neonv8-mla8-ld64.c
Expand Down Expand Up @@ -200,14 +192,6 @@ SET(NON_PROD_NEONV8_MICROKERNEL_SRCS
src/qu8-dwconv/gen/qu8-dwconv-25p8c-minmax-fp32-neonv8-mul16.c
src/qu8-dwconv/gen/qu8-dwconv-25p16c-minmax-fp32-neonv8-mul16.c
src/qu8-dwconv/gen/qu8-dwconv-25p32c-minmax-fp32-neonv8-mul16.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-neonv8-c8.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-neonv8-c16.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-neonv8-c24.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-neonv8-c32.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-neonv8-c8.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-neonv8-c16.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-neonv8-c24.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-neonv8-c32.c
src/qu8-gemm/gen/qu8-gemm-1x16-minmax-fp32-neonv8-mlal-lane.c
src/qu8-gemm/gen/qu8-gemm-4x16-minmax-fp32-neonv8-mlal-lane.c
src/qu8-igemm/gen/qu8-igemm-1x16-minmax-fp32-neonv8-mlal-lane.c
Expand Down
6 changes: 0 additions & 6 deletions cmake/gen/rvv_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -15,8 +15,6 @@ SET(PROD_RVV_MICROKERNEL_SRCS
src/f32-argmaxpool/f32-argmaxpool-9x-rvv-u1v.c
src/f32-avgpool/gen/f32-avgpool-9p8x-minmax-rvv-c2v.c
src/f32-avgpool/gen/f32-avgpool-9x-minmax-rvv-c2v.c
src/f32-gavgpool/gen/f32-gavgpool-7p7x-minmax-rvv-c2v.c
src/f32-gavgpool/gen/f32-gavgpool-7x-minmax-rvv-c2v.c
src/f32-gemm/gen/f32-gemm-1x4v-minmax-rvv.c
src/f32-gemm/gen/f32-gemm-7x4v-minmax-rvv.c
src/f32-igemm/gen/f32-igemm-1x4v-minmax-rvv.c
Expand Down Expand Up @@ -73,10 +71,6 @@ SET(PROD_RVV_MICROKERNEL_SRCS
SET(NON_PROD_RVV_MICROKERNEL_SRCS
src/f32-avgpool/gen/f32-avgpool-9p8x-minmax-rvv-c1v.c
src/f32-avgpool/gen/f32-avgpool-9x-minmax-rvv-c1v.c
src/f32-gavgpool/gen/f32-gavgpool-7p7x-minmax-rvv-c1v.c
src/f32-gavgpool/gen/f32-gavgpool-7p7x-minmax-rvv-c4v.c
src/f32-gavgpool/gen/f32-gavgpool-7x-minmax-rvv-c1v.c
src/f32-gavgpool/gen/f32-gavgpool-7x-minmax-rvv-c4v.c
src/f32-gemm/gen/f32-gemm-1x4v-relu-rvv.c
src/f32-gemm/gen/f32-gemm-1x4v-rvv.c
src/f32-gemm/gen/f32-gemm-7x4v-relu-rvv.c
Expand Down
38 changes: 0 additions & 38 deletions cmake/gen/scalar_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -40,8 +40,6 @@ SET(PROD_SCALAR_MICROKERNEL_SRCS
src/f32-dwconv2d-chw/gen/f32-dwconv2d-chw-5x5s2p2-minmax-scalar-2x1-acc2.c
src/f32-f16-vcvt/gen/f32-f16-vcvt-scalar-bitcast-u4.c
src/f32-f16-vcvt/gen/f32-f16-vcvt-scalar-fabsf-u2.c
src/f32-gavgpool/f32-gavgpool-7p7x-minmax-scalar-c1.c
src/f32-gavgpool/f32-gavgpool-7x-minmax-scalar-c1.c
src/f32-gemm/gen/f32-gemm-1x4-minmax-scalar.c
src/f32-gemm/gen/f32-gemm-1x4-relu-scalar.c
src/f32-gemm/gen/f32-gemm-1x4-scalar.c
Expand Down Expand Up @@ -156,10 +154,6 @@ SET(PROD_SCALAR_MICROKERNEL_SRCS
src/qs8-dwconv/gen/qs8-dwconv-25p2c-minmax-fp32-scalar-lrintf.c
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-scalar-u1.c
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-scalar-u4.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-scalar-imagic-c1.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-scalar-imagic-c4.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-scalar-imagic-c1.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-scalar-imagic-c4.c
src/qs8-packw/gen/qs8-packw-x64c4-gemm-goi-scalar.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-3p1c-minmax-fp32-scalar-fmagic.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-3p2c-minmax-fp32-scalar-imagic.c
Expand Down Expand Up @@ -201,10 +195,6 @@ SET(PROD_SCALAR_MICROKERNEL_SRCS
src/qu8-dwconv/gen/qu8-dwconv-25p2c-minmax-fp32-scalar-lrintf.c
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-scalar-u1.c
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-scalar-u4.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-scalar-imagic-c1.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-scalar-imagic-c4.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-scalar-imagic-c1.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-scalar-imagic-c4.c
src/qu8-gemm/gen/qu8-gemm-1x2-minmax-fp32-scalar-imagic.c
src/qu8-gemm/gen/qu8-gemm-1x4-minmax-fp32-scalar-lrintf.c
src/qu8-gemm/gen/qu8-gemm-2x2-minmax-fp32-scalar-imagic.c
Expand Down Expand Up @@ -617,20 +607,6 @@ SET(NON_PROD_SCALAR_MICROKERNEL_SRCS
src/qs8-dwconv/gen/qs8-dwconv-25p4c-minmax-fp32-scalar-lrintf.c
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-scalar-u2.c
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-scalar-u3.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-scalar-fmagic-c1.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-scalar-fmagic-c2.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-scalar-fmagic-c4.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-scalar-imagic-c2.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-scalar-lrintf-c1.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-scalar-lrintf-c2.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-scalar-lrintf-c4.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-scalar-fmagic-c1.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-scalar-fmagic-c2.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-scalar-fmagic-c4.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-scalar-imagic-c2.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-scalar-lrintf-c1.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-scalar-lrintf-c2.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-scalar-lrintf-c4.c
src/qs8-packw/gen/qs8-packw-x8c4-gemm-goi-scalar.c
src/qs8-packw/gen/qs8-packw-x8c8-gemm-goi-scalar.c
src/qs8-packw/gen/qs8-packw-x16c4-gemm-goi-scalar.c
Expand Down Expand Up @@ -780,20 +756,6 @@ SET(NON_PROD_SCALAR_MICROKERNEL_SRCS
src/qu8-dwconv/gen/qu8-dwconv-25p4c-minmax-fp32-scalar-lrintf.c
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-scalar-u2.c
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-scalar-u3.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-scalar-fmagic-c1.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-scalar-fmagic-c2.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-scalar-fmagic-c4.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-scalar-imagic-c2.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-scalar-lrintf-c1.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-scalar-lrintf-c2.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-scalar-lrintf-c4.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-scalar-fmagic-c1.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-scalar-fmagic-c2.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-scalar-fmagic-c4.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-scalar-imagic-c2.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-scalar-lrintf-c1.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-scalar-lrintf-c2.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-scalar-lrintf-c4.c
src/qu8-gemm/gen/qu8-gemm-1x2-minmax-fp32-scalar-fmagic.c
src/qu8-gemm/gen/qu8-gemm-1x2-minmax-fp32-scalar-lrintf.c
src/qu8-gemm/gen/qu8-gemm-1x2-minmax-rndnu-scalar.c
Expand Down
12 changes: 0 additions & 12 deletions cmake/gen/sse2_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -49,8 +49,6 @@ SET(PROD_SSE2_MICROKERNEL_SRCS
src/qs8-dwconv/gen/qs8-dwconv-9p8c-minmax-fp32-sse2-mul16-add16.c
src/qs8-dwconv/gen/qs8-dwconv-25p8c-minmax-fp32-sse2-mul16-add16.c
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-sse2-u32.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-sse2-c8.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-sse2-c8.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-3p8c-minmax-fp32-sse2-mul16.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-9p8c-minmax-fp32-sse2-mul16.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-25p8c-minmax-fp32-sse2-mul16.c
Expand All @@ -70,8 +68,6 @@ SET(PROD_SSE2_MICROKERNEL_SRCS
src/qu8-dwconv/gen/qu8-dwconv-9p8c-minmax-fp32-sse2-mul16.c
src/qu8-dwconv/gen/qu8-dwconv-25p8c-minmax-fp32-sse2-mul16.c
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-sse2-u32.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-sse2-c8.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-sse2-c8.c
src/qu8-gemm/gen/qu8-gemm-1x4c8-minmax-fp32-sse2-ld64.c
src/qu8-gemm/gen/qu8-gemm-3x4c8-minmax-fp32-sse2-ld64.c
src/qu8-igemm/gen/qu8-igemm-1x4c8-minmax-fp32-sse2-ld64.c
Expand Down Expand Up @@ -206,10 +202,6 @@ SET(NON_PROD_SSE2_MICROKERNEL_SRCS
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-sse2-u8.c
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-sse2-u16.c
src/qs8-f32-vcvt/gen/qs8-f32-vcvt-sse2-u24.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-sse2-c16.c
src/qs8-gavgpool/gen/qs8-gavgpool-7p7x-minmax-fp32-sse2-c24.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-sse2-c16.c
src/qs8-gavgpool/gen/qs8-gavgpool-7x-minmax-fp32-sse2-c24.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-5f5m5l8c8s8r-minmax-fp32-sse2-mul16-add16.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-5f5m5l8c8s8r-minmax-fp32-sse2-mul16.c
src/qs8-qc8w-dwconv/gen/qs8-qc8w-dwconv-5f5m5l16c8s8r-minmax-fp32-sse2-mul16-add16.c
Expand Down Expand Up @@ -293,10 +285,6 @@ SET(NON_PROD_SSE2_MICROKERNEL_SRCS
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-sse2-u8.c
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-sse2-u16.c
src/qu8-f32-vcvt/gen/qu8-f32-vcvt-sse2-u24.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-sse2-c16.c
src/qu8-gavgpool/gen/qu8-gavgpool-7p7x-minmax-fp32-sse2-c24.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-sse2-c16.c
src/qu8-gavgpool/gen/qu8-gavgpool-7x-minmax-fp32-sse2-c24.c
src/qu8-gemm/gen/qu8-gemm-1x4c2-minmax-fp32-sse2-ld64.c
src/qu8-gemm/gen/qu8-gemm-1x4c2-minmax-fp32-sse2-ld128.c
src/qu8-gemm/gen/qu8-gemm-1x4c2s4-minmax-fp32-sse2-ld64.c
Expand Down
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