Merge pull request #1 from hellow554/logicvector_rework

Logicvector rework
hellow554 · Nov 30, 2018 · 24d4758 · 24d4758
2 parents 76a351a + a2992cc
commit 24d4758
Show file tree

Hide file tree

Showing 7 changed files with 786 additions and 393 deletions.
diff --git a/benches/logicvector.rs b/benches/logicvector.rs
@@ -21,7 +21,7 @@ fn create_from_int(b: &mut Bencher) {
 fn create_from_vec(b: &mut Bencher) {
     b.iter(|| {
         for i in 0..NITER {
-            bb(LogicVector::from(vec![Ieee1164::_U; (i % 128) as usize]));
+            bb(LogicVector::from(vec![Ieee1164::_U; ((i % 127) + 1) as usize]));
         }
     })
 }
@@ -39,7 +39,7 @@ fn create_from_str(b: &mut Bencher) {
 fn create_width(b: &mut Bencher) {
     b.iter(|| {
         for i in 0..NITER {
-            bb(LogicVector::with_width((i % 128) as usize + 1));
+            bb(LogicVector::with_width(((i % 128) + 1) as u8));
         }
     })
 }
@@ -51,4 +51,4 @@ fn to_u128(b: &mut Bencher) {
             assert_eq!(Some(i), bb(LogicVector::from_int_value(i, 128)).unwrap().as_u128());
         }
     })
-}
+}
diff --git a/examples/vcd_reg_dump.rs b/examples/vcd_reg_dump.rs
@@ -2,10 +2,6 @@ use logical::dump::Vcd;
 use logical::{Ieee1164, LogicVector};
 
 fn main() {
-    let v = LogicVector::from_int_value(5, 8).unwrap();
-    assert_eq!(v.width(), 8);
-    assert_eq!(v, 5);
-
     let mut dumper = Vcd::new("VCD Example");
     let mut foo: LogicVector;
 
@@ -35,9 +31,9 @@ fn main() {
 
     let one = LogicVector::from_int_value(1, 16).unwrap();
     for _ in 0..90 {
+        foo = foo + &one;
         dumper.serialize_logivector("foo", &foo);
         dumper.tick();
-        foo = (foo + &one).unwrap();
     }
 
     dumper.dump("/home/marcel/b.vcd").unwrap();

diff --git a/src/dump/mod.rs b/src/dump/mod.rs
@@ -49,7 +49,7 @@ impl fmt::Display for Type {
 #[derive(Debug, Clone, PartialEq, Eq)]
 struct Ident {
     ty: Type,
-    width: usize,
+    width: u8,
     ident: char,
     name: String,
 }

diff --git a/src/logicbit/ieee1164.rs b/src/logicbit/ieee1164.rs
@@ -51,15 +51,15 @@ impl TryFrom<char> for Ieee1164 {
             'w' => Ieee1164::Weak(Ieee1164Value::Unknown),
             'l' => Ieee1164::Weak(Ieee1164Value::Zero),
             'h' => Ieee1164::Weak(Ieee1164Value::One),
-            '*' | '-' => Ieee1164::DontCare,
+            '*' | '-' | 'd' => Ieee1164::DontCare,
             _ => return Err(()),
         })
     }
 }
 
-impl<'a> From<&'a Ieee1164> for char {
-    fn from(i: &Ieee1164) -> Self {
-        match *i {
+impl From<Ieee1164> for char {
+    fn from(i: Ieee1164) -> Self {
+        match i {
             Ieee1164::Uninitialized => 'U',
             Ieee1164::Strong(Ieee1164Value::Unknown) => 'X',
             Ieee1164::Strong(Ieee1164Value::Zero) => '0',
@@ -188,7 +188,7 @@ expand_op_ieee1164!(resolve, Resolve, resolve);
 
 impl fmt::Display for Ieee1164 {
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        write!(f, "{}", char::from(self))
+        write!(f, "{}", char::from(*self))
     }
 }