Welcome to my Verilog Repository! This repository contains a collection of various Verilog projects. Hope you'll find something useful here.
Verilog is a hardware description language (HDL) used for designing and simulating digital circuits. It is widely used in the field of digital design, FPGA programming, and ASIC development. This repository aims to provide a curated collection of Verilog projects that can serve as educational resources, reference implementations, or starting points for your own designs. In these cases, an ice40HX8K FPGA is utilized to run the programs. A majority of these programs are designed to run on a simulation provided by Purdue Univeristy provided here: [https://verilog.ecn.purdue.edu/].
Below is a list of projects included in this repository:
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Binary to 7-Segment Display Converter: A Verilog module that takes a 3-digit binary input and converts it into signals to drive a 7-segment display.
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Multiplexers and Encoders: A collection of Verilog modules that fall into the realm of multiplexers and encoders of various types.
Each project in this repository is contained within its own directory. Inside each project directory, you will find the Verilog source files along with any necessary documentation or testbenches.