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Conv latest #19523

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Conv latest #19523

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ccbabf4
[GPU] Enable tile and fuse matmul by default
nirvedhmeshram Dec 18, 2024
401e33d
Add pattern for Conv2DNchwFchwQOp to Conv2DNchwFchwOp
nirvedhmeshram Dec 17, 2024
0fed6e7
Add channel last pass in global opt
nirvedhmeshram Dec 18, 2024
b3dc7c5
Remove a check for canTargetIntrinsic
zjgarvey Dec 18, 2024
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[GPU] Enable tile and fuse matmul by default 
Signed-off-by: Nirvedh <nirvedh@gmail.com>
@nirvedhmeshram
nirvedhmeshram committed Dec 18, 2024
commit ccbabf426900d6989f1fcb6fd7f07a6d05c08c3b
8 changes: 4 additions & 4 deletions compiler/src/iree/compiler/Codegen/LLVMGPU/KernelConfig.cpp
View file
Original file line number Diff line number Diff line change
@@ -48,10 +48,10 @@
#define LDBG(X) LLVM_DEBUG(DBGS() << X << "\n")
namespace mlir::iree_compiler {

llvm::cl::opt<bool> clGPUTestTileAndFuseMatmul(
"iree-codegen-llvmgpu-test-tile-and-fuse-matmul",
llvm::cl::opt<bool> clGPUEnableTileAndFuseMatmul(
"iree-codegen-llvmgpu-enable-tile-and-fuse-matmul",
llvm::cl::desc("test the the tile and fuse pipeline for matmul"),
llvm::cl::init(false));
llvm::cl::init(true));

llvm::cl::opt<bool> clGPUTestTileAndFuseVectorize(
"iree-codegen-llvmgpu-test-tile-and-fuse-vectorize",
@@ -2298,7 +2298,7 @@ static LogicalResult setRootConfig(IREE::GPU::TargetAttr target,
LDBG("Tile and fuse data tiled multi_mma config");
return success();
}
if (clGPUTestTileAndFuseMatmul) {
if (clGPUEnableTileAndFuseMatmul) {
if (succeeded(IREE::GPU::setMatmulLoweringConfig(target, entryPointFn,
computeOp))) {
LDBG("Tile and fuse matmul config");
4 changes: 2 additions & 2 deletions compiler/src/iree/compiler/Codegen/LLVMGPU/test/gpu_set_num_workgroups.mlir
View file
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// RUN: iree-opt --split-input-file --pass-pipeline="builtin.module(iree-codegen-llvmgpu-configuration-pipeline)" \
// RUN: --iree-gpu-test-target=sm_60 %s | FileCheck %s
// RUN: --iree-gpu-test-target=sm_60 --iree-codegen-llvmgpu-enable-tile-and-fuse-matmul=false %s | FileCheck %s
// RUN: iree-opt --split-input-file --pass-pipeline="builtin.module(iree-codegen-llvmgpu-configuration-pipeline)" \
// RUN: --iree-gpu-test-target=sm_80 %s | FileCheck %s --check-prefix=SM80
// RUN: --iree-gpu-test-target=sm_80 --iree-codegen-llvmgpu-enable-tile-and-fuse-matmul=false %s | FileCheck %s --check-prefix=SM80

// Transform dialect attributes are tested separately.