Add vdiv

code/gen_impl.py

@@ -58,6 +58,13 @@
             file=f,
         )
         print(f"}}", file=f)
+    with open(f"vdiv_{width}.h", "w") as f:
+        print(f"for (int i = 0;i < {128 // w};i++) {{", file=f)
+        print(
+            f"  dst.{m}[i] = (b.{m}[i] == 0) ? 0 : ({sign}{w})a.{m}[i] / (({sign}{w})b.{m}[i]);",
+            file=f,
+        )
+        print(f"}}", file=f)
 
 for width in ["b", "bu", "h", "hu", "w", "wu", "d", "du"]:
     double_width = double_widths[width]

code/gen_tb.py

@@ -31,6 +31,7 @@
     "vbitrevi": (widths_signed, "v128 a, int imm", [0, 3, 7]),
     "vclo": (widths_signed, "v128 a"),
     "vclz": (widths_signed, "v128 a"),
+    "vdiv": (widths_all, "v128 a, v128 b"),
 }
 
 for name in tb:

code/vdiv_b.cpp

@@ -0,0 +1,9 @@
+#include "common.h"
+
+v128 vdiv_b(v128 a, v128 b) {
+  v128 dst;
+#include "vdiv_b.h"
+  return dst;
+}
+
+void test() { FUZZ2(vdiv_b); }

code/vdiv_b.h

@@ -0,0 +1,3 @@
+for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (b.byte[i] == 0) ? 0 : (s8)a.byte[i] / ((s8)b.byte[i]);
+}

code/vdiv_bu.cpp

@@ -0,0 +1,9 @@
+#include "common.h"
+
+v128 vdiv_bu(v128 a, v128 b) {
+  v128 dst;
+#include "vdiv_bu.h"
+  return dst;
+}
+
+void test() { FUZZ2(vdiv_bu); }

code/vdiv_bu.h

@@ -0,0 +1,3 @@
+for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (b.byte[i] == 0) ? 0 : (u8)a.byte[i] / ((u8)b.byte[i]);
+}

code/vdiv_d.cpp

@@ -0,0 +1,9 @@
+#include "common.h"
+
+v128 vdiv_d(v128 a, v128 b) {
+  v128 dst;
+#include "vdiv_d.h"
+  return dst;
+}
+
+void test() { FUZZ2(vdiv_d); }

code/vdiv_d.h

@@ -0,0 +1,3 @@
+for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (b.dword[i] == 0) ? 0 : (s64)a.dword[i] / ((s64)b.dword[i]);
+}

code/vdiv_du.cpp

@@ -0,0 +1,9 @@
+#include "common.h"
+
+v128 vdiv_du(v128 a, v128 b) {
+  v128 dst;
+#include "vdiv_du.h"
+  return dst;
+}
+
+void test() { FUZZ2(vdiv_du); }

code/vdiv_du.h

@@ -0,0 +1,3 @@
+for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (b.dword[i] == 0) ? 0 : (u64)a.dword[i] / ((u64)b.dword[i]);
+}

code/vdiv_h.cpp

@@ -0,0 +1,9 @@
+#include "common.h"
+
+v128 vdiv_h(v128 a, v128 b) {
+  v128 dst;
+#include "vdiv_h.h"
+  return dst;
+}
+
+void test() { FUZZ2(vdiv_h); }

code/vdiv_h.h

@@ -0,0 +1,3 @@
+for (int i = 0; i < 8; i++) {
+  dst.half[i] = (b.half[i] == 0) ? 0 : (s16)a.half[i] / ((s16)b.half[i]);
+}

code/vdiv_hu.cpp

@@ -0,0 +1,9 @@
+#include "common.h"
+
+v128 vdiv_hu(v128 a, v128 b) {
+  v128 dst;
+#include "vdiv_hu.h"
+  return dst;
+}
+
+void test() { FUZZ2(vdiv_hu); }

code/vdiv_hu.h

@@ -0,0 +1,3 @@
+for (int i = 0; i < 8; i++) {
+  dst.half[i] = (b.half[i] == 0) ? 0 : (u16)a.half[i] / ((u16)b.half[i]);
+}

code/vdiv_w.cpp

@@ -0,0 +1,9 @@
+#include "common.h"
+
+v128 vdiv_w(v128 a, v128 b) {
+  v128 dst;
+#include "vdiv_w.h"
+  return dst;
+}
+
+void test() { FUZZ2(vdiv_w); }

code/vdiv_w.h

@@ -0,0 +1,3 @@
+for (int i = 0; i < 4; i++) {
+  dst.word[i] = (b.word[i] == 0) ? 0 : (s32)a.word[i] / ((s32)b.word[i]);
+}

code/vdiv_wu.cpp

@@ -0,0 +1,9 @@
+#include "common.h"
+
+v128 vdiv_wu(v128 a, v128 b) {
+  v128 dst;
+#include "vdiv_wu.h"
+  return dst;
+}
+
+void test() { FUZZ2(vdiv_wu); }

code/vdiv_wu.h

@@ -0,0 +1,3 @@
+for (int i = 0; i < 4; i++) {
+  dst.word[i] = (b.word[i] == 0) ? 0 : (u32)a.word[i] / ((u32)b.word[i]);
+}

docs/lsx_integer/vaddsub.md → docs/lsx_integer/computation.md

@@ -1,4 +1,4 @@
-# Add, Subtract, Absolute and Average
+# Integer Computation
 
 {{ vadd('b') }}
 {{ vadd('h') }}
@@ -67,4 +67,13 @@
 {{ vavgr('w') }}
 {{ vavgr('wu') }}
 {{ vavgr('d') }}
-{{ vavgr('du') }}
+{{ vavgr('du') }}
+
+{{ vdiv('b') }}
+{{ vdiv('bu') }}
+{{ vdiv('h') }}
+{{ vdiv('hu') }}
+{{ vdiv('w') }}
+{{ vdiv('wu') }}
+{{ vdiv('d') }}
+{{ vdiv('du') }}

docs/lsx_integer/vshift.md → docs/lsx_integer/shift.md

@@ -1,4 +1,4 @@
-# Shift
+# Integer Shift
 
 ## __m128i __lsx_vbsll_v (__m128i a, imm0_31 imm)
 

main.py

@@ -231,6 +231,15 @@ def vclz(name):
             desc=f"Count leading zeros of {width}-bit elements in `a`.",
         )
 
+    @env.macro
+    def vdiv(name):
+        width = widths[name]
+        return instruction(
+            intrinsic=f"__m128i __lsx_div_{name} (__m128i a, __m128i b)",
+            instr=f"vdiv.{name} vr, vr, vr",
+            desc=f"Divide {width}-bit elements in `a` by elements in `b`.",
+        )
+
     @env.macro
     def vshuf_hwd(name):
         width = widths[name]