update the table of content (SUMMARY.md)

kingcard1131 · Jul 29, 2017 · f7e5766 · f7e5766
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diff --git a/README.md b/README.md
@@ -231,7 +231,7 @@ TileLink总线的channel名称和功能，支持的报文类型和传输协议
 ## 6. 低功耗设计
 从设计上分析低功耗的原因
 
-# 第九章 浮点处理器
+# 第九章 浮点运算
 介绍RISC-V的浮点指令、分析Rocket-Chip中自带的FPU（其中包括结合整体的流水线介绍FPU对流水线的影响，以及FPU如何融入到流水线中）
 > leishangwen:<br>
 > 这个先放在这里吧，理由有两个：1、还不确定如果单独作为一章，那么讲的内容有哪些，能否独立成完整的一章；2、单独作为一章放在Rocket、BOOM两章的后面，有点破坏整本书的目录结构，有点突兀，如果确实要单独成章，建议放在全书的最后。

diff --git a/SUMMARY.md b/SUMMARY.md
@@ -2,36 +2,40 @@
 
 * [内容简介](README.md)
 * [第一章 RISC-V产生的时代背景](ch1-background.md)
-  * [1 计算机体系结构和处理器微结构](ch1-background/1-ji-suan-ji-ti-xi-jie-gou-he-chu-li-qi-wei-jie-gou.md)
-  * [2 现有指令集](ch1-background/2-xian-you-zhi-ling-ji.md)
-  * [3 硬件开发的变迁](ch1-background/3-ying-jian-kai-fa-de-bian-qian.md)
-  * [4 开源运动](ch1-background/4-kai-yuan-yun-dong.md)
-  * 参考文献
-* [第二章 RISC-V的基本情况](ch2-riscv-basic.md)
-  * 1 RISC-V的历史
-  * 2 RISC-V的基本设计原理
-  * 3 RISC-V特权指令设计
-  * 4 内存模型
-  * 5 RISC-V的压缩指令
-  * 6 RISC-V的扩展指令集
-  * 7 Spike模拟器
-  * 8 RISC-V的软件生态
-  * 9 RISC-V在产业界与学术界的现状
-  * 参考文献
-* [第三章 Rocket-Chip概述](ch3-current-status.md)
-  * [1 Chisel和FIRRTL](ch3/sec1-open-riscv-cpu.md)
-  * [2 Rocket-Chip的基本结构](ch3/sec2-commercial-riscv-cpu.md)
-  * [3. TileLink片上总线](ch3/sec3-open-riscv-soc.md)
-  * [4. 缓存一致性与片上互联总线](ch3/sec4-commercial-riscv-soc.md)
-  * [5. Rocket-chip的仿真和测试](ch3/sec5-summary.md)
+  * [1 计算机体系结构和处理器微结构](ch1/sec1-comparch.md)
+  * [2 现有指令集](ch1/sec2-isa.md)
+  * [3 硬件开发的变迁](ch1/sec3-hardware.md)
+  * [4 开源运动](ch1/sec4-opensource.md)
+  * [参考文献](ch1/reference.md)
+* [第二章 RISC-V](ch2-riscv.md)
+  * [1 RISC-V的历史](ch2/sec1-history.md)
+  * [2 RISC-V的基本设计原理](ch2/sec2-isa-design.md)
+  * [3 RISC-V特权指令设计](ch2/sec3-privilege.md)
+  * [4 内存模型](ch2/sec4-memory-model.md)
+  * [5 RISC-V的压缩指令](ch2/sec5-rvc.md)
+  * [6 RISC-V的扩展指令集](ch2/sec6-extension.md)
+  * [7 Spike模拟器](ch2/sec7-spike.md)
+  * [8 RISC-V的软件生态](ch2/sec8-ecosystem.md)
+  * [9 RISC-V在产业界与学术界的现状](ch2/sec9-status.md)
+  * [参考文献](ch2/reference.md)
+* [第三章 Rocket-Chip概述](ch3-rocket-chip.md)
+  * [1 Chisel和FIRRTL](ch3/sec1-chisel.md)
+  * [2 Rocket-Chip的基本结构](ch3/sec2-overview.md)
+  * [3 TileLink片上总线](ch3/sec3-tilelink.md)
+  * [4 缓存一致性与片上互联总线](ch3/sec4-soc.md)
+  * [5 Rocket-chip的仿真和测试](ch3/sec5-verification.md)
   * [参考文献](ch3/reference.md)
-* [第四章 Rocket处理器](ch4-chisel.md)
-  * [1.Rocket介绍](ch4-chisel/1rocketjie-shao.md)
-  * 2. Rocket的基本流水线
-* [第五章 Rocket-Chip概述](ch5-rocket-chip.md)
-* [第六章 Rocket处理器](ch6-rocket-core.md)
-* [第七章 BOOM处理器](ch7-boom-core.md)
-* [第八章 SiFive公司的Freedom系列](ch8-freedom.md)
-* [第九章 LowRISC](ch9-lowrisc.md)
-* [第十章 RISCV-mini源代码分析](ch10-riscv-mini.md)
+* [第四章 Rocket处理器](ch4-rocket-core.md)
+  * [1 Rocket介绍](ch4/sec1-overview.md)
+  * [2 Rocket的基本流水线](ch4/sec2-pipeline.md)
+  * [3 指令缓存以及分支预测](ch4/sec3-icache.md)
+  * [4 数据缓存](ch4/sec4-dcache.md)
+  * [5 虚拟内存支持](ch4/sec5-vm.md)
+  * [6 Rocket处理器RoCC设计分析](ch4/sec6-rocc.md)
+  * [参考文献](ch4/reference.md)
+* [第五章 BOOM处理器](ch5-boom-core.md)
+* [第六章 SiFive公司的Freedom系列](ch6-freedom.md)
+* [第七章 lowRISC](ch7-lowrisc.md)
+* [第八章 PULPino](ch8-pulpino.md)
+* [第九章 浮点运算](ch9-fpu.md)
 
diff --git a/ch1-background/1-ISA-MA.md → ch1-background.md b/ch1-background/1-ISA-MA.md → ch1-background.md
diff --git a/ch1-background/ch1-sec2-Intro-some-ISA.md → ch1/reference.md b/ch1-background/ch1-sec2-Intro-some-ISA.md → ch1/reference.md
diff --git a/ch1-background/ch1-sec1-ISA-MA.md → ch1/sec1-comparch.md b/ch1-background/ch1-sec1-ISA-MA.md → ch1/sec1-comparch.md
diff --git a/...ckground/ch1-sec3-hardware-development.md → ch1/sec2-isa.md b/...ckground/ch1-sec3-hardware-development.md → ch1/sec2-isa.md
diff --git a/ch1-background/ch1-sec4-opensource.md → ch1/sec3-hardware.md b/ch1-background/ch1-sec4-opensource.md → ch1/sec3-hardware.md
diff --git a/ch10-riscv-mini.md → ch1/sec4-opensource.md b/ch10-riscv-mini.md → ch1/sec4-opensource.md
diff --git a/ch2-riscv-basic.md → ch2-riscv.md b/ch2-riscv-basic.md → ch2-riscv.md
diff --git a/ch3-current-status.md → ch2/reference.md b/ch3-current-status.md → ch2/reference.md
diff --git a/ch3/sec2-commercial-riscv-cpu.md → ch2/sec1-history.md b/ch3/sec2-commercial-riscv-cpu.md → ch2/sec1-history.md
diff --git a/ch3/sec4-commercial-riscv-soc.md → ch2/sec2-isa-design.md b/ch3/sec4-commercial-riscv-soc.md → ch2/sec2-isa-design.md
diff --git a/ch3/sec5-summary.md → ch2/sec3-privilege.md b/ch3/sec5-summary.md → ch2/sec3-privilege.md
diff --git a/ch4-chisel.md → ch2/sec4-memory-model.md b/ch4-chisel.md → ch2/sec4-memory-model.md
diff --git a/ch4-chisel/1.md → ch2/sec5-rvc.md b/ch4-chisel/1.md → ch2/sec5-rvc.md
diff --git a/ch4-chisel/1rocketjie-shao.md → ch2/sec6-extension.md b/ch4-chisel/1rocketjie-shao.md → ch2/sec6-extension.md
diff --git a/ch5-rocket-chip.md → ch2/sec7-spike.md b/ch5-rocket-chip.md → ch2/sec7-spike.md
diff --git a/ch6-rocket-core.md → ch2/sec8-ecosystem.md b/ch6-rocket-core.md → ch2/sec8-ecosystem.md
diff --git a/ch3/sec3-open-riscv-soc.md → ch2/sec9-status.md b/ch3/sec3-open-riscv-soc.md → ch2/sec9-status.md
diff --git a/ch7-boom-core.md → ch3-rocket-chip.md b/ch7-boom-core.md → ch3-rocket-chip.md
diff --git a/ch8-freedom.md → ch3/sec1-chisel.md b/ch8-freedom.md → ch3/sec1-chisel.md
diff --git a/ch9-lowrisc.md → ch3/sec2-overview.md b/ch9-lowrisc.md → ch3/sec2-overview.md
diff --git a/ch3/sec3-tilelink.md b/ch3/sec3-tilelink.md
diff --git a/ch3/sec4-soc.md b/ch3/sec4-soc.md
diff --git a/ch3/sec5-verification.md b/ch3/sec5-verification.md
diff --git a/ch4-rocket-core.md b/ch4-rocket-core.md
diff --git a/ch4/reference.md b/ch4/reference.md
diff --git a/ch3/sec1-open-riscv-cpu.md → ch4/sec1-overview.md b/ch3/sec1-open-riscv-cpu.md → ch4/sec1-overview.md
diff --git a/ch4/sec2-pipeline.md b/ch4/sec2-pipeline.md
diff --git a/ch4/sec3-icache.md b/ch4/sec3-icache.md
diff --git a/ch4/sec4-dcache.md b/ch4/sec4-dcache.md
diff --git a/ch4/sec5-vm.md b/ch4/sec5-vm.md
diff --git a/ch4/sec6-rocc.md b/ch4/sec6-rocc.md
diff --git a/ch5-boom.md b/ch5-boom.md
diff --git a/ch6-freedom.md b/ch6-freedom.md
diff --git a/ch7-lowrisc.md b/ch7-lowrisc.md
diff --git a/ch8-pulpino.md b/ch8-pulpino.md
diff --git a/ch9-fpu.md b/ch9-fpu.md