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CET466 Digital Logic

This repository is for the CCSU Fall 2020 CET466 Digital Logic course.

The course will be using the RZ-EasyFPGA board which is a nice, inexpensive board that uses a Cyclone IV chip.

Picture of the board.

This image shows some of the features of the board.

Features on the board.

The pinouts are shown below.

Pinouts of the board.

Some Links

Most of this repository is a downloaded and unrarred version of the files here. I figured a GitHub repository might be more accessible.

The original manufacturer of the board seems to be here.

I found the pinout image above on Hey There Buddo!.

This page says how to run Quartus on a Mac, however, I was not successful in getting it to be able to program the board using the USB blaster. It does all the compulation etc. fine, just doesn't blow the board (either JTAG or AS).

This page shows quite detailed instructions about getting the board running under Windows.. Note that this page uses Verilog, but the course will be taught using VHDL.

There are some other GitHub repositories around that reference the RZ EasyFPGA board. Here's one that I cloned

To download Quartus Prime v20.1, go to the Intel site and download it. Be warned: it's LARGE.

To clone this repository on Windows, you need to have long file names enabled by running git config --system core.longpaths true. Otherwise git will give an error about Clone succeeded but checkout failed.

Some more information, including the marked up image showing the board features above is available from here.

The NAND2Tetris text book was the inspiration for this repository

Some Videos

There are several videos on YouTube using the board, though most are not in English:

CET466 Syllabus

Despite what I've written in the official syllabus, the main points of CET466 are the following applied to programming FPGAs in VHDL to make combinatorial and sequential logic circuits:

  • Plan : Use what you learned in CET363 to capture and refine a paper design of a logic circuit.
  • Do : Implement the logic circuit paper design in VHDL.
  • Review : Use Quartus Prime Lite to write a test harness that partially or exhaustively tests that the implementation solves the design problem.

Plan : What is in CET363?

The catalog description of CET363 is:

Principles and applications of digital circuits, number systems, Boolean Algebra, combinatorial and sequential logic circuits, arithmetic circuits, and MSI logic circuits. Laboratory experiments focus on circuit building and troubleshooting using TTL integrated circuits.

So the key points are:

  1. The circuits we want to work with are digital circuits. So you need to understand binary numbers and the difference between active low and active high.
  2. The number systems we deal with are binary, octal, decimal, and hexadecimal. You need to be able to convert between all of them.
  3. The problems we deal with can generally be reduced to Boolean algebra. That means you need to understand how to write and manipulate expressions using Boolean (binary) variables. Know the laws of Boolean algebra, especially De Morgan's Law.
  4. Know what a combinatorial circuit is.
  5. Know what a sequential circuit is.
  6. Know what a full adder and a half-adder do and how they work.
  7. Know the different sorts of logic gates available: AND, OR, NOT, NAND, NOR, buffer, SR F/F, JK F/F, T F/F, D F/F, latches, decoders, encoders, LUTs, etc.

Do : Do the design in VHDL

This means you need to understand all the different language constructs in VHDL.

The way to do this gradually is to build up your knowledge over a series of labs:

  • Design a half-adder.
  • Make a full-adder.
  • Make a four-bit adder.
  • Fix the four-bit adder's glitches.
  • Make an up/down counter.
  • Make a baseball score counter.
  • Take on a larger group project.

The key thing to remember about VHDL is that, unless the code is within a process() block, EVERYTHING HAPPENS AT ONCE.

VHDL code is not sequential.

Inside a process() block, code is sequential. To be able to use if statements, they need to be inside a process() block.

Review : Add a testbench to your Quartus project

To run a test, you need to run the ModelSim-Altera FREE test software. This comes with Quartus Prime Lite and should already be installed. See the second video below for a run through of what is required.

Videos

  1. This video shows how to setup the boards
  2. This video shows how to add a test bench
  3. This video shows how to run Quartus on the Citrix server
  4. Full video playlist of the Fall 2021 CET466 lectures + additions

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