Skip to content

Commit

Permalink
Staged
Browse files Browse the repository at this point in the history
  • Loading branch information
mohanson committed Nov 12, 2024
1 parent fefa338 commit b663302
Show file tree
Hide file tree
Showing 5 changed files with 95 additions and 57 deletions.
39 changes: 1 addition & 38 deletions tests/machine_build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,11 +2,10 @@ use bytes::Bytes;
use ckb_vm::cost_model::constant_cycles;
#[cfg(has_asm)]
use ckb_vm::machine::asm::{AsmCoreMachine, AsmMachine};
use ckb_vm::machine::{trace::TraceMachine, DefaultCoreMachine, VERSION2};
use ckb_vm::machine::{trace::TraceMachine, DefaultCoreMachine};
use ckb_vm::registers::{A0, A7};
use ckb_vm::{
DefaultMachineBuilder, Error, Register, SparseMemory, SupportMachine, Syscalls, WXorXMemory,
ISA_A, ISA_B, ISA_IMC,
};

pub struct SleepSyscall {}
Expand All @@ -29,42 +28,6 @@ impl<Mac: SupportMachine> Syscalls<Mac> for SleepSyscall {
}
}

#[cfg(has_asm)]
pub fn asm_v2_imacb(path: &str) -> AsmMachine {
let buffer: Bytes = std::fs::read(path).unwrap().into();
let asm_core = AsmCoreMachine::new(ISA_IMC | ISA_A | ISA_B, VERSION2, u64::MAX);
let core = DefaultMachineBuilder::<Box<AsmCoreMachine>>::new(asm_core)
.instruction_cycle_func(Box::new(constant_cycles))
.syscall(Box::new(SleepSyscall {}))
.build();
let mut machine = AsmMachine::new(core);
machine
.load_program(&buffer, &vec![Bytes::from("main")])
.unwrap();
machine
}

pub fn int_v2_imacb(
path: &str,
) -> TraceMachine<DefaultCoreMachine<u64, WXorXMemory<SparseMemory<u64>>>> {
let buffer: Bytes = std::fs::read(path).unwrap().into();
let core_machine = DefaultCoreMachine::<u64, WXorXMemory<SparseMemory<u64>>>::new(
ISA_IMC | ISA_A | ISA_B,
VERSION2,
u64::MAX,
);
let mut machine = TraceMachine::new(
DefaultMachineBuilder::new(core_machine)
.instruction_cycle_func(Box::new(constant_cycles))
.syscall(Box::new(SleepSyscall {}))
.build(),
);
machine
.load_program(&buffer, &vec![Bytes::from("main")])
.unwrap();
machine
}

#[cfg(has_asm)]
pub fn asm(path: &str, args: Vec<Bytes>, version: u32, isa: u8) -> AsmMachine {
let buffer: Bytes = std::fs::read(path).unwrap().into();
Expand Down
57 changes: 47 additions & 10 deletions tests/test_a_extension.rs
Original file line number Diff line number Diff line change
@@ -1,18 +1,28 @@
use ckb_vm::Error;
use ckb_vm::{machine::VERSION2, Error, ISA_A, ISA_IMC};
#[cfg(has_asm)]
use ckb_vm::{CoreMachine, Memory};
pub mod machine_build;

#[test]
pub fn test_write_permission_bug() {
let mut machine = machine_build::int_v2_imacb("tests/programs/amo_write_permission");
let mut machine = machine_build::int(
"tests/programs/amo_write_permission",
vec![],
VERSION2,
ISA_IMC | ISA_A,
);
let ret = machine.run();
assert!(ret.is_err());
assert_eq!(ret.err(), Some(Error::MemWriteOnExecutablePage(16)));

#[cfg(has_asm)]
{
let mut machine_asm = machine_build::asm_v2_imacb("tests/programs/amo_write_permission");
let mut machine_asm = machine_build::asm(
"tests/programs/amo_write_permission",
vec![],
VERSION2,
ISA_IMC | ISA_A,
);
let ret_asm = machine_asm.run();
assert!(ret_asm.is_err());
assert_eq!(ret_asm.err(), Some(Error::MemWriteOnExecutablePage(16)));
Expand All @@ -21,14 +31,24 @@ pub fn test_write_permission_bug() {

#[test]
pub fn test_sc_after_sc() {
let mut machine = machine_build::int_v2_imacb("tests/programs/sc_after_sc");
let mut machine = machine_build::int(
"tests/programs/sc_after_sc",
vec![],
VERSION2,
ISA_IMC | ISA_A,
);
let ret = machine.run();
assert!(ret.is_ok());
assert_eq!(ret.unwrap(), 0);

#[cfg(has_asm)]
{
let mut machine_asm = machine_build::asm_v2_imacb("tests/programs/sc_after_sc");
let mut machine_asm = machine_build::asm(
"tests/programs/sc_after_sc",
vec![],
VERSION2,
ISA_IMC | ISA_A,
);
let ret_asm = machine_asm.run();
assert!(ret_asm.is_ok());
assert_eq!(ret_asm.unwrap(), 0);
Expand All @@ -37,14 +57,16 @@ pub fn test_sc_after_sc() {

#[test]
pub fn test_sc_only() {
let mut machine = machine_build::int_v2_imacb("tests/programs/sc_only");
let mut machine =
machine_build::int("tests/programs/sc_only", vec![], VERSION2, ISA_IMC | ISA_A);
let ret = machine.run();
assert!(ret.is_ok());
assert_eq!(ret.unwrap(), 0);

#[cfg(has_asm)]
{
let mut machine_asm = machine_build::asm_v2_imacb("tests/programs/sc_only");
let mut machine_asm =
machine_build::asm("tests/programs/sc_only", vec![], VERSION2, ISA_IMC | ISA_A);
let ret_asm = machine_asm.run();
assert!(ret_asm.is_ok());
assert_eq!(ret_asm.unwrap(), 0);
Expand All @@ -53,14 +75,24 @@ pub fn test_sc_only() {

#[test]
pub fn test_amo_compare() {
let mut machine = machine_build::int_v2_imacb("tests/programs/amo_compare");
let mut machine = machine_build::int(
"tests/programs/amo_compare",
vec![],
VERSION2,
ISA_IMC | ISA_A,
);
let ret = machine.run();
assert!(ret.is_ok());
assert_eq!(ret.unwrap(), 0);

#[cfg(has_asm)]
{
let mut machine_asm = machine_build::asm_v2_imacb("tests/programs/amo_compare");
let mut machine_asm = machine_build::asm(
"tests/programs/amo_compare",
vec![],
VERSION2,
ISA_IMC | ISA_A,
);
let ret_asm = machine_asm.run();
assert!(ret_asm.is_ok());
assert_eq!(ret_asm.unwrap(), 0);
Expand All @@ -71,7 +103,12 @@ pub fn test_amo_compare() {
pub fn test_amo_check_write() {
#[cfg(has_asm)]
{
let mut machine_asm = machine_build::asm_v2_imacb("tests/programs/amo_check_write");
let mut machine_asm = machine_build::asm(
"tests/programs/amo_check_write",
vec![],
VERSION2,
ISA_IMC | ISA_A,
);
let page_a = 0;
let page_b = 17;
let flag_a = machine_asm.machine.memory_mut().fetch_flag(page_a).unwrap();
Expand Down
16 changes: 13 additions & 3 deletions tests/test_misc.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
use ckb_vm::cost_model::constant_cycles;
use ckb_vm::error::OutOfBoundKind;
use ckb_vm::machine::{VERSION0, VERSION1};
use ckb_vm::machine::{VERSION0, VERSION1, VERSION2};
use ckb_vm::registers::{A0, A1, A2, A3, A4, A5, A7};
use ckb_vm::{
run, CoreMachine, Debugger, DefaultCoreMachine, DefaultMachineBuilder, Error, FlatMemory,
Expand Down Expand Up @@ -458,14 +458,24 @@ pub fn test_clang() {
}

{
let mut machine = machine_build::int_v2_imacb("tests/programs/clang_sample");
let mut machine = machine_build::int(
"tests/programs/clang_sample",
vec![],
VERSION2,
ISA_IMC | ISA_B,
);
let ret = machine.run();
assert!(ret.is_ok());
}

#[cfg(has_asm)]
{
let mut machine_asm = machine_build::asm_v2_imacb("tests/programs/clang_sample");
let mut machine_asm = machine_build::asm(
"tests/programs/clang_sample",
vec![],
VERSION2,
ISA_IMC | ISA_B,
);
let ret_asm = machine_asm.run();
assert!(ret_asm.is_ok());
}
Expand Down
7 changes: 6 additions & 1 deletion tests/test_resume.rs
Original file line number Diff line number Diff line change
Expand Up @@ -299,7 +299,12 @@ impl Machine {

#[test]
pub fn test_sc_after_snapshot() {
let mut machine = machine_build::int_v2_imacb("tests/programs/sc_after_snapshot");
let mut machine = machine_build::int(
"tests/programs/sc_after_snapshot",
vec![],
VERSION2,
ISA_IMC | ISA_A,
);
machine.machine.set_max_cycles(5);
let ret = machine.run();
assert!(ret.is_err());
Expand Down
33 changes: 28 additions & 5 deletions tests/test_signal_pause.rs
Original file line number Diff line number Diff line change
@@ -1,18 +1,31 @@
use ckb_vm::{Error, SupportMachine};
use ckb_vm::machine::VERSION2;
use ckb_vm::{Error, SupportMachine, ISA_B, ISA_IMC};
use std::sync::atomic::{AtomicU32, Ordering};
use std::sync::Arc;
pub mod machine_build;

#[cfg(has_asm)]
#[test]
pub fn test_asm_pause() {
use ckb_vm::machine::VERSION2;

let expect_cycles = {
let mut machine = machine_build::asm_v2_imacb("tests/programs/pause_resume");
let mut machine = machine_build::asm(
"tests/programs/pause_resume",
vec![],
VERSION2,
ISA_IMC | ISA_B,
);
machine.run().unwrap();
machine.machine.cycles()
};

let mut machine = machine_build::asm_v2_imacb("tests/programs/pause_resume");
let mut machine = machine_build::asm(
"tests/programs/pause_resume",
vec![],
VERSION2,
ISA_IMC | ISA_B,
);
let branch_pause_cnt = Arc::new(AtomicU32::new(0));
let branch_pause_cnt_jh = branch_pause_cnt.clone();

Expand Down Expand Up @@ -40,12 +53,22 @@ pub fn test_asm_pause() {
#[test]
pub fn test_int_pause() {
let expect_cycles = {
let mut machine = machine_build::int_v2_imacb("tests/programs/pause_resume");
let mut machine = machine_build::int(
"tests/programs/pause_resume",
vec![],
VERSION2,
ISA_IMC | ISA_B,
);
machine.run().unwrap();
machine.machine.cycles()
};

let mut machine = machine_build::int_v2_imacb("tests/programs/pause_resume");
let mut machine = machine_build::int(
"tests/programs/pause_resume",
vec![],
VERSION2,
ISA_IMC | ISA_B,
);
let branch_pause_cnt = Arc::new(AtomicU32::new(0));
let branch_pause_cnt_jh = branch_pause_cnt.clone();
let signal = machine.machine.pause();
Expand Down

0 comments on commit b663302

Please sign in to comment.