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Pull requests: llvm/circt

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Pull requests list

[LLHD][TCM] Ignore processes with CFG loops within a TR LLHD

#8196 opened Feb 6, 2025 by maerhart

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[RTG][Elaboration] Use malloc instead of IR for virtual registers and labels RTG

Involving the `rtg` dialect

#8194 opened Feb 5, 2025 by maerhart

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[ImportVerilog]Support real math functions. Moore

#8192 opened Feb 5, 2025 by hailongSun2000

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[RTG] Add interleave_sequences op RTG

Involving the `rtg` dialect

#8189 opened Feb 4, 2025 by maerhart

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[RTG] Custom assembly format for 'rtg.test' operation RTG

Involving the `rtg` dialect

#8188 opened Feb 4, 2025 by maerhart

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[RTG] Add the PyRTG frontend RTG

Involving the `rtg` dialect

#8187 opened Feb 4, 2025 by maerhart

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[FIRRTL] Add Clock Switch intrinsic

#8183 opened Feb 3, 2025 by darthscsi • Draft

[COMB] Get rid of "bin" flag in comb.

#8180 opened Feb 3, 2025 by darthscsi • Draft

[firtool] Add an option to emit HW MLIR into file

#8169 opened Feb 1, 2025 by uenoku

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[circt-test] Add support for contracts

#8166 opened Jan 31, 2025 by fabianschuiki

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[FIRRTL][LowerToHW] Lower contract ops FIRRTL