Test

Bump vtr-verilog-to-routing from `6ce3706` to `39c80f4` #6176

Job	Run time
Detect code changes	7s
Debug Build (Ubuntu 22.04)	30m 28s
Build (GCC-11 on Ubuntu 20.04)	46m 59s
Build (Clang-10 on Ubuntu 20.04)	42m 5s
Build w/o Yosys (Ubuntu 22.04)	21m 34s
Build Compatibility: GCC-9 (Ubuntu 22.04)	34m 45s
Build w/o Yosys plugin (Ubuntu 22.04)	37m 42s
No-warning Build (Ubuntu 22.04)	36m 30s
Build Compatibility: GCC-10 (Ubuntu 22.04)	36m 48s
Build w/o test (Ubuntu 22.04)	36m 23s
Build Compatibility: GCC-11 (Ubuntu 22.04)	38m 5s
Build w/o version number (Ubuntu 22.04)	36m 23s
Build Compatibility: GCC-12 (Ubuntu 22.04)	40m 18s
Build w/o SWIG support (Ubuntu 22.04)	36m 9s
docker_regression_tests	0s
Build Compatibility: Clang-11 (Ubuntu 22.04)	39m 29s
Build Compatibility: Clang-12 (Ubuntu 22.04)	40m 15s
Build Compatibility: Clang-13 (Ubuntu 22.04)	40m 13s
Build Compatibility: Clang-14 (Ubuntu 22.04)	40m 32s
Build docker image for distribution	28s
linux_regression_tests (basic_reg_yosys_only_test)	28s
linux_regression_tests (basic_reg_test)	18m 35s
linux_regression_tests (fpga_verilog_reg_test)	8m 14s
linux_regression_tests (fpga_bitstream_reg_test)	12m 53s
linux_regression_tests (fpga_sdc_reg_test)	32s
linux_regression_tests (fpga_spice_reg_test)	18s
linux_regression_tests (micro_benchmark_reg_test)	3m 34s
linux_regression_tests (quicklogic_reg_test)	14m 28s
linux_regression_tests (vtr_benchmark_reg_test)	11m 8s
linux_regression_tests (iwls_benchmark_reg_test)	11m 36s
linux_regression_tests (tcl_reg_test)	18s
	11h 57m 17s

Provide feedback