Merge pull request #1515 from lnis-uofu/xt_pbpin

[core] fixed a bug where pb pin fixup may fail when subtile capacities are not same

openfpga/src/base/openfpga_pb_pin_fixup.cpp

@@ -47,8 +47,8 @@ static void update_cluster_pin_with_post_routing_results(
      * here z offset is the location in the multiple-logic-tile tile Get
      * physical pin does not consider THIS!!!!
      */
-    int physical_pin = z * logical_block->pb_type->num_pins +
-                       get_physical_pin(physical_tile, logical_block, j);
+    int physical_pin =
+      get_physical_pin_at_sub_tile_location(physical_tile, logical_block, z, j);
     auto pin_class = physical_tile->pin_class[physical_pin];
     auto class_inf = physical_tile->class_inf[pin_class];