Add custom Rust target supporting bitmanip extensions

This target description is the same as `riscv32imc-unknown-none-elf` but
with the `Zba`, `Zbb`, `Zbs` (collectively `B`), and `Zbc` extensions
enabled. Ibex supports more, but upstream LLVM does not.

You can check the built-in `riscv32imc-unknown-none-elf` JSON file to
compare against using this command:

```sh
rustc +nightly \
  -Z unstable-options \
  --target=riscv32imc-unknown-none-elf \
  --print target-spec-json
```

sw/rust/.cargo/config.toml

@@ -3,7 +3,7 @@
 # SPDX-License-Identifier: Apache-2.0
 
 [build]
-target = "riscv32imc-unknown-none-elf"
+target = "riscv32imcb-unknown-none-elf.json"
 
 [target.riscv32imc-unknown-none-elf]
 runner = "../../util/load_demo_system.sh run"

sw/rust/demo/hello_world/README.md

@@ -9,7 +9,7 @@ How to run this demo:
 4. Run the gdb:
 
 ```console
-$ riscv32-unknown-elf-gdb ../../target/riscv32imc-unknown-none-elf/debug/led
+$ riscv32-unknown-elf-gdb ../../target/riscv32imcb-unknown-none-elf/debug/led
 
 (gdb) # Connect to OpenOCD
 (gdb) target remote :3333

sw/rust/riscv32imcb-unknown-none-elf.json

@@ -0,0 +1,23 @@
+{
+  "arch": "riscv32",
+  "atomic-cas": false,
+  "cpu": "generic-rv32",
+  "crt-objects-fallback": "false",
+  "data-layout": "e-m:e-p:32:32-i64:64-n32-S128",
+  "eh-frame-header": false,
+  "emit-debug-gdb-scripts": false,
+  "features": "+m,+c,+zba,+zbb,+zbc,+zbs,+forced-atomics",
+  "is-builtin": false,
+  "linker": "rust-lld",
+  "linker-flavor": "gnu-lld",
+  "llvm-target": "riscv32",
+  "max-atomic-width": 32,
+  "metadata": {
+    "description": "Bare RISC-V (RV32IMCBZbc ISA)",
+    "host_tools": false,
+    "std": false
+  },
+  "panic-strategy": "abort",
+  "relocation-model": "static",
+  "target-pointer-width": "32"
+}

sw/rust/rust-toolchain.toml

@@ -1,3 +1,3 @@
 [toolchain]
-targets = ["riscv32imc-unknown-none-elf"]
 channel = "nightly"
+components = ["rust-src"]