-
Notifications
You must be signed in to change notification settings - Fork 811
Issues: lowRISC/opentitan
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Author
Label
Projects
Milestones
Assignee
Sort
Issues list
[tool, doc] Clarify autogenerated doc via "gen_cfg_md.py"
Component:Doc
Documentation issue
Component:Tooling
Issues related to tooling, e.g. tools/scripts for doc, code generation (docgen, reggen), CSR
#26297
opened Feb 14, 2025 by
martin-velay
[top_darjeeling] Conflicting flash properties
Component:Darjeeling
#26289
opened Feb 13, 2025 by
alees24
[top_darjeeling] OTP-related discoveries from Darjeeling bring up.
Component:Darjeeling
IP:otp_ctrl
#26288
opened Feb 13, 2025 by
alees24
4 tasks
[bazel] Add a way for execution environments to provide their hashfile
SW:Build System
SW:ROM
ROM related issues
#26250
opened Feb 11, 2025 by
AlexJones0
[top_darjeeling] Enable lint checks for all HW IP blocks
Component:Darjeeling
#26245
opened Feb 11, 2025 by
andreaskurth
9 tasks
[Multitop, test] chip_sw_racl_smoketest
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_mbx_smoketest
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:mbx
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_keymgr_dpe_key_derivation
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:keymgr
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_dma_inline_hashing
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:dma
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_sram_ctrl_scrambled_access
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:sram
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_spi_device_pass_through
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:spi_device
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_sleep_pin_mio_dio_val
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:pwrmgr
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_rv_core_ibex_rnd
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:rv_core
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_rv_core_ibex_nmi_irq
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:rv_core
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_rstmgr_sw_rst
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:rstmgr
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_rstmgr_sw_req
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:rstmgr
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_rstmgr_cpu_info
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:rstmgr
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_rstmgr_alert_info
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:rstmgr
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_power_virus
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_otbn_randomness
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:otbn
Multitop:Autogen
Priority:P2
Priority: medium
[Multitop, test] chip_sw_kmac_idle
Component:ChipLevelTest
Used to filter the chip-level test backlog
IP:kmac
Multitop:Autogen
Priority:P2
Priority: medium
Previous Next
ProTip!
Updated in the last three days: updated:>2025-02-13.