[sram_ctrl,dv] Properly flush TL agent on resets

[nasahlpa]

Description

When we are entering reset, for example with the following test:

./util/dvsim/dvsim.py hw/ip/sram_ctrl/dv/sram_ctrl_main_sim_cfg.hjson \
  -i sram_ctrl_passthru_mem_tl_intg_err -t vcs --fixed-seed \
  41020402185315011969996404882728929238760707320232330314609988937493640571488

UVM_ERROR @ 2116319532 ps: uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block sequencer [uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.sequencer] get_next_item/try_next_item called twice without item_done or get in between

the TL agent queue is not yet flushed. Hence, we need to wait a bit before starting a new test and sending new TL requests (see #25740). As this is not clean, we should investigate & fix this.