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DM-45413: raw VMS output #28

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Average, Min, Max and Raw FIFOs.
Dropped OutputType Control. Intruduce new FIFOs to record
min/max/average and raw output.
  • Loading branch information
pkubanek committed Jul 30, 2024
commit 19fcc7b5624550802fb2327e512403d1e2315d4d
111,796 changes: 59,506 additions & 52,290 deletions Bitfiles/NiFpga_VMS_3_Controller.lvbitx

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108,610 changes: 55,880 additions & 52,730 deletions Bitfiles/NiFpga_VMS_3_Responder.lvbitx

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103,264 changes: 54,505 additions & 48,759 deletions Bitfiles/NiFpga_VMS_6_Controller.lvbitx

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102,848 changes: 54,144 additions & 48,704 deletions Bitfiles/NiFpga_VMS_6_Responder.lvbitx

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22 changes: 9 additions & 13 deletions src/LSST/VMS/FPGA.cpp
Original file line number Diff line number Diff line change
@@ -49,15 +49,16 @@ FPGA::FPGA(token) : SimpleFPGA(LSST::cRIO::VMS) {}

#define NiFpga_VMS_6_Responder_ControlBool_Operate -1
#define NiFpga_VMS_3_Responder_ControlBool_Operate -1
#define NiFpga_VMS_CameraRotator_Responder_ControlBool_Operate -1

#define POPULATE_FPGA(type) \
_bitFile = "/var/lib/MTVMS/" NiFpga_VMS_##type##_Bitfile; \
_signature = NiFpga_VMS_##type##_Signature; \
_responseFIFO = NiFpga_VMS_##type##_TargetToHostFifoU32_ResponseFIFO; \
_averageFIFO = NiFpga_VMS_##type##_TargetToHostFifoSgl_Average; \
_minFIFO = NiFpga_VMS_##type##_TargetToHostFifoFxp_Min_Resource; \
_maxFIFO = NiFpga_VMS_##type##_TargetToHostFifoFxp_Max_Resource; \
_rawOutputFIFO = NiFpga_VMS_##type##_TargetToHostFifoFxp_RawOutput_Resource; \
_operateResource = NiFpga_VMS_##type##_ControlBool_Operate; \
_periodResource = NiFpga_VMS_##type##_ControlU32_Periodms; \
_outputTypeResource = NiFpga_VMS_##type##_ControlI16_Outputtype; \
_readyResource = NiFpga_VMS_##type##_IndicatorBool_Ready; \
_stoppedResource = NiFpga_VMS_##type##_IndicatorBool_Stopped; \
_timeoutedResource = NiFpga_VMS_##type##_IndicatorBool_Timeouted; \
@@ -71,7 +72,8 @@ void FPGA::populate(VMSApplicationSettings *vmsApplicationSettings) {
_vmsApplicationSettings = vmsApplicationSettings;
session = 0;
remaining = 0;
if ((_vmsApplicationSettings->Subsystem == "M1M3")) {
if ((_vmsApplicationSettings->Subsystem == "M1M3" ||
_vmsApplicationSettings->Subsystem == "CameraRotator")) {
_channels = 3;
if (_vmsApplicationSettings->IsController) {
POPULATE_FPGA(3_Controller);
@@ -85,13 +87,8 @@ void FPGA::populate(VMSApplicationSettings *vmsApplicationSettings) {
} else {
POPULATE_FPGA(6_Responder);
}
} else if ((_vmsApplicationSettings->Subsystem == "CameraRotator")) {
_channels = 3;
if (_vmsApplicationSettings->IsController) {
POPULATE_FPGA(CameraRotator_Controller);
} else {
POPULATE_FPGA(CameraRotator_Responder);
}
} else {
throw std::runtime_error("Cannot create VMS for settings " + _vmsApplicationSettings->Subsystem);
}
}

@@ -160,7 +157,6 @@ void FPGA::setOperate(bool operate) {
void FPGA::setPeriodOutputType(uint32_t period, int16_t outputType) {
#ifndef SIMULATOR
cRIO::NiThrowError(__PRETTY_FUNCTION__, NiFpga_WriteU32(session, _periodResource, period));
cRIO::NiThrowError(__PRETTY_FUNCTION__, NiFpga_WriteI16(session, _outputTypeResource, outputType));
#else
// _ready = true;
#endif
@@ -211,7 +207,7 @@ void FPGA::readResponseFIFO(uint32_t *data, size_t length, int32_t timeoutInMs)
SPDLOG_TRACE("FPGA: readResponseFIFO({}, {})", length, timeoutInMs);
#ifndef SIMULATOR
cRIO::NiThrowError(__PRETTY_FUNCTION__,
NiFpga_ReadFifoU32(session, _responseFIFO, data, length, timeoutInMs, &remaining));
NiFpga_ReadFifoU32(session, _averageFIFO, data, length, timeoutInMs, &remaining));
// enable this if you are looking for raw, at source accelerometers data
#if 0
size_t i = length;
8 changes: 5 additions & 3 deletions src/LSST/VMS/FPGA.h
Original file line number Diff line number Diff line change
@@ -36,7 +36,7 @@ const NiFpga_FxpTypeInfo ResponseFxpTypeInfo = {1, 24, 8};

class VMSApplicationSettings;

/*!
/***
* The class used to communicate with the FPGA.
*/
class FPGA : public LSST::cRIO::SimpleFPGA, public LSST::cRIO::Singleton<FPGA> {
@@ -69,13 +69,15 @@ class FPGA : public LSST::cRIO::SimpleFPGA, public LSST::cRIO::Singleton<FPGA> {
uint8_t _channels;
const char *_bitFile;
const char *_signature;
uint32_t _responseFIFO;
uint32_t _averageFIFO;
uint32_t _minFIFO;
uint32_t _maxFIFO;
uint32_t _rawOutputFIFO;
uint32_t _chasisTemperatureResource;
NiFpga_FxpTypeInfo _chasisTemperatureTypeInfo;
uint32_t _operateResource;
uint32_t _readyResource;
uint32_t _periodResource;
uint32_t _outputTypeResource;
uint32_t _stoppedResource;
uint32_t _timeoutedResource;
uint32_t _fifoFullResource;
47 changes: 45 additions & 2 deletions src/NiFpga/NiFpga.c
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
/*
* FPGA Interface C API 23.0 source file.
* FPGA Interface C API 24.3 source file.
*
* Copyright (c) 2023,
* Copyright (c) 2024,
* National Instruments Corporation.
* All rights reserved.
*/
@@ -1108,6 +1108,22 @@ NiFpga_Status NiFpga_AcquireFifoReadElementsDbl(NiFpga_Session session, uint32_t
: NiFpga_Status_ResourceNotInitialized;
}

static NiFpga_Status(NiFpga_CCall* NiFpga_acquireFifoReadRegion)(
NiFpga_Session session, uint32_t fifo, void** region, void** elements, NiFpga_Bool isSigned,
uint32_t elementSizeBytes, size_t elementsRequested, uint32_t timeout, size_t* elementsAcquired,
size_t* elementsRemaining) = NULL;

NiFpga_Status NiFpga_AcquireFifoReadRegion(NiFpga_Session session, uint32_t fifo, void** region,
void** elements, NiFpga_Bool isSigned, uint32_t elementSizeBytes,
size_t elementsRequested, uint32_t timeout,
size_t* elementsAcquired, size_t* elementsRemaining) {
return NiFpga_acquireFifoReadRegion
? NiFpga_acquireFifoReadRegion(session, fifo, region, elements, isSigned, elementSizeBytes,
elementsRequested, timeout, elementsAcquired,
elementsRemaining)
: NiFpga_Status_VersionMismatch;
}

static NiFpga_Status(NiFpga_CCall* NiFpga_acquireFifoWriteElementsBool)(
NiFpga_Session session, uint32_t fifo, NiFpga_Bool** elements, size_t elementsRequested,
uint32_t timeout, size_t* elementsAcquired, size_t* elementsRemaining) = NULL;
@@ -1252,6 +1268,22 @@ NiFpga_Status NiFpga_AcquireFifoWriteElementsDbl(NiFpga_Session session, uint32_
: NiFpga_Status_ResourceNotInitialized;
}

static NiFpga_Status(NiFpga_CCall* NiFpga_acquireFifoWriteRegion)(
NiFpga_Session session, uint32_t fifo, void** region, void** elements, NiFpga_Bool isSigned,
uint32_t elementSizeBytes, size_t elementsRequested, uint32_t timeout, size_t* elementsAcquired,
size_t* elementsRemaining) = NULL;

NiFpga_Status NiFpga_AcquireFifoWriteRegion(NiFpga_Session session, uint32_t fifo, void** region,
void** elements, NiFpga_Bool isSigned, uint32_t elementSizeBytes,
size_t elementsRequested, uint32_t timeout,
size_t* elementsAcquired, size_t* elementsRemaining) {
return NiFpga_acquireFifoWriteRegion
? NiFpga_acquireFifoWriteRegion(session, fifo, region, elements, isSigned,
elementSizeBytes, elementsRequested, timeout,
elementsAcquired, elementsRemaining)
: NiFpga_Status_VersionMismatch;
}

static NiFpga_Status(NiFpga_CCall* NiFpga_releaseFifoElements)(NiFpga_Session session, uint32_t fifo,
size_t elements) = NULL;

@@ -1260,6 +1292,14 @@ NiFpga_Status NiFpga_ReleaseFifoElements(NiFpga_Session session, uint32_t fifo,
: NiFpga_Status_ResourceNotInitialized;
}

static NiFpga_Status(NiFpga_CCall* NiFpga_releaseFifoRegion)(NiFpga_Session session, uint32_t fifo,
void* region) = NULL;

NiFpga_Status NiFpga_ReleaseFifoRegion(NiFpga_Session session, uint32_t fifo, void* region) {
return NiFpga_releaseFifoRegion ? NiFpga_releaseFifoRegion(session, fifo, region)
: NiFpga_Status_VersionMismatch;
}

static NiFpga_Status(NiFpga_CCall* NiFpga_getPeerToPeerFifoEndpoint)(NiFpga_Session session, uint32_t fifo,
uint32_t* endpoint) = NULL;

@@ -1528,6 +1568,7 @@ static const struct {
1},
{"NiFpgaDll_AcquireFifoReadElementsDbl", (NiFpga_FunctionPointer*)&NiFpga_acquireFifoReadElementsDbl,
1},
{"NiFpgaDll_AcquireFifoReadRegion", (NiFpga_FunctionPointer*)&NiFpga_acquireFifoReadRegion, 0},
{"NiFpgaDll_AcquireFifoWriteElementsBool",
(NiFpga_FunctionPointer*)&NiFpga_acquireFifoWriteElementsBool, 1},
{"NiFpgaDll_AcquireFifoWriteElementsI8", (NiFpga_FunctionPointer*)&NiFpga_acquireFifoWriteElementsI8,
@@ -1550,7 +1591,9 @@ static const struct {
(NiFpga_FunctionPointer*)&NiFpga_acquireFifoWriteElementsSgl, 1},
{"NiFpgaDll_AcquireFifoWriteElementsDbl",
(NiFpga_FunctionPointer*)&NiFpga_acquireFifoWriteElementsDbl, 1},
{"NiFpgaDll_AcquireFifoWriteRegion", (NiFpga_FunctionPointer*)&NiFpga_acquireFifoWriteRegion, 0},
{"NiFpgaDll_ReleaseFifoElements", (NiFpga_FunctionPointer*)&NiFpga_releaseFifoElements, 1},
{"NiFpgaDll_ReleaseFifoRegion", (NiFpga_FunctionPointer*)&NiFpga_releaseFifoRegion, 0},
{"NiFpgaDll_GetPeerToPeerFifoEndpoint", (NiFpga_FunctionPointer*)&NiFpga_getPeerToPeerFifoEndpoint,
1},
{"NiFpgaDll_MapP2PSinkFifo", (NiFpga_FunctionPointer*)&NiFpga_mapP2PSinkFifo, 0},
96 changes: 93 additions & 3 deletions src/NiFpga/NiFpga.h
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
/*
* FPGA Interface C API 23.0 header file.
* FPGA Interface C API 24.3 header file.
*
* Copyright (c) 2023,
* Copyright (c) 2024,
* National Instruments Corporation.
* All rights reserved.
*/
@@ -2271,7 +2271,19 @@ typedef enum {
*
* This property is only Getable and cannot be Set.
*/
NiFpga_FifoProperty_ElementsCurrentlyAcquired = 8
NiFpga_FifoProperty_ElementsCurrentlyAcquired = 8,
/**
* PreferredNumaNode
* Type: I32
* The NUMA node the FIFO should be allocated on.
*/
NiFpga_FifoProperty_PreferredNumaNode = 9,
/**
* NumberOfZeroCopyRegions
* Type: U32
* The number of zero copy regions that can be acquired at once.
*/
NiFpga_FifoProperty_NumberOfZeroCopyRegions = 10
} NiFpga_FifoProperty;

typedef enum {
@@ -3215,6 +3227,37 @@ NiFpga_Status NiFpga_AcquireFifoReadElementsDbl(NiFpga_Session session, uint32_t
size_t elementsRequested, uint32_t timeout,
size_t* elementsAcquired, size_t* elementsRemaining);

/**
* Acquires a zero copy region for reading from a target-to-host FIFO
*
* Acquiring, reading, and releasing zero copy FIFO regions prevents the need to copy
* the contents of elements from the host memory buffer to a separate user-allocated
* buffer. This can be useful when accessing large sections.The FPGA target cannot write to
* elements acquired by the host. Therefore the host must release regions after reading them.
* The number of elements may differ from the number of elements requested if, for example,
* the number of elements requested reaches the end of the host memory buffer. Always release all
* acquired regions before closing the session. Do not attempt to access FIFO
* regions after the regions are released or the session is closed.
*
* @param session handle to a currently open session
* @param fifo target-to-host FIFO from which to read
* @param region points to an opaque type the user will need to release the region
* @param elements outputs a pointer to the elements acquired
* @param isSigned whether the data is signed or not
* @param elementSizeBytes Size in bytes of the data type to read
* @param elementsRequested requested number of elements
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
* @param elementsAcquired actual number of elements acquired, which may be
* less than the requested number
* @param elementsRemaining if non-NULL, outputs the number of elements
* remaining in the host memory part of the DMA FIFO
* @return result of the call
*/
NiFpga_Status NiFpga_AcquireFifoReadRegion(NiFpga_Session session, uint32_t fifo, void** region,
void** elements, NiFpga_Bool isSigned, uint32_t elementSizeBytes,
size_t elementsRequested, uint32_t timeout,
size_t* elementsAcquired, size_t* elementsRemaining);

/**
* @}
*/
@@ -3542,6 +3585,38 @@ NiFpga_Status NiFpga_AcquireFifoWriteElementsDbl(NiFpga_Session session, uint32_
size_t elementsRequested, uint32_t timeout,
size_t* elementsAcquired, size_t* elementsRemaining);

/**
* Acquires a zero copy region for writing to a host-to-target FIFO.
*
* Acquiring, writing, and releasing FIFO zero copy FIFO regions prevents the need to write
* first into a separate user-allocated buffer and then copy the contents of
* elements to the host memory buffer. The FPGA target cannot read elements
* acquired by the host. Therefore, the host must release regions after
* writing to them. The number of elements acquired may differ from the number
* of elements requested if, for example, the number of elements requested
* reaches the end of the host memory buffer. Always release all acquired
* regions before closing the session. Do not attempt to access FIFO elements
* after the elements are released or the session is closed.
*
* @param session handle to a currently open session
* @param fifo host-to-target FIFO to which to write
* @param region points to an opaque type the user will need to release the region
* @param elements outputs a pointer to the elements acquired
* @param isSigned whether the data is signed or not
* @param elementSizeBytes Size in bytes of the data type to write
* @param elementsRequested requested number of elements
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
* @param elementsAcquired actual number of elements acquired, which may be
* less than the requested number
* @param elementsRemaining if non-NULL, outputs the number of elements
* remaining in the host memory part of the DMA FIFO
* @return result of the call
*/
NiFpga_Status NiFpga_AcquireFifoWriteRegion(NiFpga_Session session, uint32_t fifo, void** region,
void** elements, NiFpga_Bool isSigned, uint32_t elementSizeBytes,
size_t elementsRequested, uint32_t timeout,
size_t* elementsAcquired, size_t* elementsRemaining);

/**
* @}
*/
@@ -3565,6 +3640,21 @@ NiFpga_Status NiFpga_AcquireFifoWriteElementsDbl(NiFpga_Session session, uint32_
*/
NiFpga_Status NiFpga_ReleaseFifoElements(NiFpga_Session session, uint32_t fifo, size_t elements);

/**
* Releases a previously acquired FIFO region.
*
* The FPGA target cannot read elements in a region acquired by the host. Therefore, the
* host must release regions after acquiring them. Always release all acquired
* regions before closing the session. Do not attempt to access FIFO elements
* after the elements are released or the session is closed.
*
* @param session handle to a currently open session
* @param fifo FIFO from which to release elements
* @param region Points to the region to release
* @return result of the call
*/
NiFpga_Status NiFpga_ReleaseFifoRegion(NiFpga_Session session, uint32_t fifo, void* region);

/**
* Gets an endpoint reference to a peer-to-peer FIFO.
*
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