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APPL-4092: IPv4 fragmented packets are changed
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@jackyh2020
jackyh2020 committed Sep 29, 2022
1 parent ff9a49d commit 259665f
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Showing 3 changed files with 68 additions and 6 deletions.
8 changes: 4 additions & 4 deletions src/config/proj_opt/proj_opt_ferret_release.h
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Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@
#define UNMANAGED_FLOW_CTRL_IF

/* Enable debug for TCAM */
#define UNMANAGED_TCAM_DEBUG_IF 0
#define UNMANAGED_TCAM_DEBUG_IF 0

/* Enable debug for ANEG disabled and forced 1Gfdx speed for SGMII/SERDES interface
* MUST set value =0x2 or 0x9 for CPORT_MAPTO_MIIMBUS accoringly
Expand Down Expand Up @@ -91,10 +91,10 @@


/****************************************************************************
* End to End Transparent clock
* One-step End to End Transparent clock
****************************************************************************/
#define TRANSIT_E2ETC 0
#define TRANSIT_TCAM_IS2 0
#define TRANSIT_E2ETC 1
#define TRANSIT_TCAM_IS2 1


/****************************************************************************
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15 changes: 14 additions & 1 deletion src/switch/h2tcam.c
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Original file line number Diff line number Diff line change
Expand Up @@ -77,6 +77,7 @@ typedef enum {
IS2_HALF_ETH_PTP_MSG_TYPE,
IS2_HALF_ETH_TWO_STEP,
IS2_HALF_IPV4_IS_IPV4,
IS2_HALF_IPV4_IS_FRAG,
IS2_HALF_IPV4_UDP_TYPE,
IS2_HALF_IPV4_DPORT,
IS2_HALF_IPV4_PTP_MSG_TYPE,
Expand Down Expand Up @@ -290,7 +291,7 @@ void h2_tcam_e2e_tc_get(u16 entry_id,tcam_data_conf_t *conf)

void h2_tcam_e2e_tc_set(tcam_e2e_tc_t ace_conf)
{
if ( is2_entry_id <= MAX_ACE_LIMIT ) {
if ( is2_entry_id <= MAX_ACE_LIMIT ) {
if (ace_conf == TCAM_E2E_TC_PTP_ETH) {
h2tcam_add_is2_ptp_ethernet(is2_entry_id++,ace_conf);
} else if (ace_conf == TCAM_E2E_TC_PTP_IP) {
Expand Down Expand Up @@ -384,6 +385,10 @@ static void get_offset_len_par(is2_conf_param_t type,u16 *offset)
offset[0] = 46;
offset[1] = 1;
break;
case IS2_HALF_IPV4_IS_FRAG:
offset[0] = 47;
offset[1] = 1;
break;
case IS2_HALF_IPV4_UDP_TYPE:
offset[0] = 124;
offset[1] = 1;
Expand Down Expand Up @@ -542,6 +547,12 @@ static void h2tcam_is2_set_ipv4_conf(h2ace_is2_t *ace_conf,tcam_data_conf_t *tca
value[0] = 1;
h2tcam_bit_feild_32bit_set(offset_info[0],offset_info[1],value,tcam_conf->tcam_mask);

get_offset_len_par(IS2_HALF_IPV4_IS_FRAG,offset_info);
value[0]= 0;
h2tcam_bit_feild_32bit_set(offset_info[0],offset_info[1],value,tcam_conf->tcam_entry);
value[0] = 1;
h2tcam_bit_feild_32bit_set(offset_info[0],offset_info[1],value,tcam_conf->tcam_mask);

get_offset_len_par(IS2_HALF_IPV4_UDP_TYPE,offset_info);
value[0]=(u32)(ace_conf->pkt_info.ipv4.tcp);
h2tcam_bit_feild_32bit_set(offset_info[0],offset_info[1],value,tcam_conf->tcam_entry);
Expand All @@ -560,11 +571,13 @@ static void h2tcam_is2_set_ipv4_conf(h2ace_is2_t *ace_conf,tcam_data_conf_t *tca
value[0] = 2;
h2tcam_bit_feild_32bit_set(offset_info[0],offset_info[1],value,tcam_conf->tcam_mask);


get_offset_len_par(IS2_HALF_IPV4_TWO_STEP,offset_info);
value[0]=(u32)(ace_conf->pkt_info.ipv4.payload.ptp_payload.ptp_two_step);
h2tcam_bit_feild_32bit_set(offset_info[0],offset_info[1],value,tcam_conf->tcam_entry);
value[0] = 1;
h2tcam_bit_feild_32bit_set(offset_info[0],offset_info[1],value,tcam_conf->tcam_mask);

}
static void h2tcam_is2_set_eth_conf(h2ace_is2_t *ace_conf,tcam_data_conf_t *tcam_conf)
{
Expand Down
51 changes: 50 additions & 1 deletion src/switch/vtss_api/base/ocelot/vtss_ocelot_reg.h
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Original file line number Diff line number Diff line change
Expand Up @@ -77,5 +77,54 @@
#define IS1_ACTION_TYPE_SMAC_SIP4 1
#define IS1_ACTION_TYPE_SMAC_SIP6 2

#endif /* _LUTON26_REG_H */
/* IS2 half key - IP4_TCP_UDP/IP4_OTHER common */
//srvl_vcap_key_bit_set(data, IS2_HKO_L3_FRAGMENT, fragment);
//srvl_vcap_key_bit_set(data, IS2_HKO_L3_FRAG_OFS_GT0, VTSS_VCAP_BIT_ANY);
#define VTSS_CHIP_PORTS 11
#define IS2_HKO_TYPE 0
#define IS2_HKL_TYPE 4
#define IS2_HKO_FIRST (IS2_HKO_TYPE + IS2_HKL_TYPE)
#define IS2_HKL_FIRST 1
#define IS2_HKO_PAG (IS2_HKO_FIRST + IS2_HKL_FIRST)
#define IS2_HKL_PAG 8
#define IS2_HKO_IGR_PORT_MASK (IS2_HKO_PAG + IS2_HKL_PAG)
#define IS2_HKL_IGR_PORT_MASK (VTSS_CHIP_PORTS + 1)
#define IS2_HKO_SERVICE_FRM (IS2_HKO_IGR_PORT_MASK + IS2_HKL_IGR_PORT_MASK)
#define IS2_HKL_SERVICE_FRM 1
#define IS2_HKO_HOST_MATCH (IS2_HKO_SERVICE_FRM + IS2_HKL_SERVICE_FRM)
#define IS2_HKL_HOST_MATCH 1
#define IS2_HKO_L2_MC (IS2_HKO_HOST_MATCH + IS2_HKL_HOST_MATCH)
#define IS2_HKL_L2_MC 1
#define IS2_HKO_L2_BC (IS2_HKO_L2_MC + IS2_HKL_L2_MC)
#define IS2_HKL_L2_BC 1
#define IS2_HKO_VLAN_TAGGED (IS2_HKO_L2_BC + IS2_HKL_L2_BC)
#define IS2_HKL_VLAN_TAGGED 1
#define IS2_HKO_VID (IS2_HKO_VLAN_TAGGED + IS2_HKL_VLAN_TAGGED)
#define IS2_HKL_VID 12
#define IS2_HKO_DEI (IS2_HKO_VID + IS2_HKL_VID)
#define IS2_HKL_DEI 1
#define IS2_HKO_PCP (IS2_HKO_DEI + IS2_HKL_DEI)
#define IS2_HKL_PCP 3

#define IS2_HKL_PCP 3
#define IS2_HKO_L2_DMAC (IS2_HKO_PCP + IS2_HKL_PCP)
#define IS2_HKO_IP4 IS2_HKO_L2_DMAC
#define IS2_HKL_IP4 1
#define IS2_HKO_L3_FRAGMENT (IS2_HKO_IP4 + IS2_HKL_IP4)
#define IS2_HKL_L3_FRAGMENT 1
#define IS2_HKO_L3_FRAG_OFS_GT0 (IS2_HKO_L3_FRAGMENT + IS2_HKL_L3_FRAGMENT)
#define IS2_HKL_L3_FRAG_OFS_GT0 1
#define IS2_HKO_L3_OPTIONS (IS2_HKO_L3_FRAG_OFS_GT0 + IS2_HKL_L3_FRAG_OFS_GT0)
#define IS2_HKL_L3_OPTIONS 1
#define IS2_HKO_L3_TTL_GT0 (IS2_HKO_L3_OPTIONS + IS2_HKL_L3_OPTIONS)
#define IS2_HKL_L3_TTL_GT0 1
#define IS2_HKO_L3_TOS (IS2_HKO_L3_TTL_GT0 + IS2_HKL_L3_TTL_GT0)
#define IS2_HKL_L3_TOS 8
#define IS2_HKO_L3_IP4_DIP (IS2_HKO_L3_TOS + IS2_HKL_L3_TOS)
#define IS2_HKL_L3_IP4_DIP 32
#define IS2_HKO_L3_IP4_SIP (IS2_HKO_L3_IP4_DIP + IS2_HKL_L3_IP4_DIP)
#define IS2_HKL_L3_IP4_SIP 32
#define IS2_HKO_DIP_EQ_SIP (IS2_HKO_L3_IP4_SIP + IS2_HKL_L3_IP4_SIP)
#define IS2_HKL_DIP_EQ_SIP 1
#endif /* _VTSS_OCELOT_REG_H_ */

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