fmt fix

openhcl/virt_mshv_vtl/src/processor/hardware_cvm/mod.rs

@@ -1311,8 +1311,8 @@ pub(crate) fn validate_xsetbv_exit(input: XsetbvExitInput) -> Option<u64> {
     Some(xfem)
 }
 
-impl<'a, 'b, T: CpuIo, B: HardwareIsolatedBacking>
-    TranslateGvaSupport for UhEmulationState<'a, 'b, T, B>
+impl<'a, 'b, T: CpuIo, B: HardwareIsolatedBacking> TranslateGvaSupport
+    for UhEmulationState<'a, 'b, T, B>
 {
     type Error = UhRunVpError;
 

openhcl/virt_mshv_vtl/src/processor/mod.rs

@@ -64,11 +64,11 @@ use std::sync::Arc;
 use std::task::Poll;
 use std::time::Duration;
 use virt::io::CpuIo;
-use virt_support_x86emu::emulate::EmulatorSupport;
 use virt::Processor;
 use virt::StopVp;
 use virt::VpHaltReason;
 use virt::VpIndex;
+use virt_support_x86emu::emulate::EmulatorSupport;
 use vm_topology::processor::TargetVpInfo;
 use vmcore::vmtime::VmTimeAccess;
 use vtl_array::VtlArray;
@@ -1036,8 +1036,7 @@ impl<'a, T: Backing> UhProcessor<'a, T> {
         vtl: GuestVtl,
     ) -> Option<u32>
     where
-        for<'b> UhEmulationState<'b, 'a, D, T>:
-            EmulatorSupport<Error = UhRunVpError>
+        for<'b> UhEmulationState<'b, 'a, D, T>: EmulatorSupport<Error = UhRunVpError>,
     {
         let guest_memory = &self.partition.gm[vtl];
         let mut emulation_state = UhEmulationState {
@@ -1068,23 +1067,20 @@ impl<'a, T: Backing> UhProcessor<'a, T> {
         vtl: GuestVtl,
     ) -> Result<(), VpHaltReason<UhRunVpError>>
     where
-        for<'b> UhEmulationState<'b, 'a, D, T>:
-            EmulatorSupport<Error = UhRunVpError>,
+        for<'b> UhEmulationState<'b, 'a, D, T>: EmulatorSupport<Error = UhRunVpError>,
     {
         let guest_memory = &self.partition.gm[vtl];
         let mut emulation_state = UhEmulationState {
-                vp: &mut *self,
-                interruption_pending,
-                devices,
-                vtl,
-                cache: T::EmulationCache::default(),
-            };
-        emulation_state.load_registers();
-        let res = virt_support_x86emu::emulate::emulate(
-            &mut emulation_state,
-            guest_memory,
+            vp: &mut *self,
+            interruption_pending,
             devices,
-            ).await;
+            vtl,
+            cache: T::EmulationCache::default(),
+        };
+        emulation_state.load_registers();
+        let res =
+            virt_support_x86emu::emulate::emulate(&mut emulation_state, guest_memory, devices)
+                .await;
         emulation_state.flush();
         res
     }

openhcl/virt_mshv_vtl/src/processor/mshv/x64.rs

@@ -1243,9 +1243,7 @@ impl UhProcessor<'_, HypervisorBackedX86> {
     }
 }
 
-impl<T: CpuIo> EmulatorSupport
-    for UhEmulationState<'_, '_, T, HypervisorBackedX86>
-{
+impl<T: CpuIo> EmulatorSupport for UhEmulationState<'_, '_, T, HypervisorBackedX86> {
     type Error = UhRunVpError;
 
     fn load_registers(&mut self) {
@@ -1260,7 +1258,8 @@ impl<T: CpuIo> EmulatorSupport
             HvX64RegisterName::Efer,
         ];
         let mut values = [FromZeroes::new_zeroed(); NAMES.len()];
-        self.vp.runner
+        self.vp
+            .runner
             .get_vp_registers(self.vtl, NAMES, &mut values)
             .expect("register query should not fail");
 
@@ -1290,13 +1289,17 @@ impl<T: CpuIo> EmulatorSupport
     }
 
     fn flush(&mut self) {
-        self.vp.runner
+        self.vp
+            .runner
             .set_vp_registers(
                 self.vtl,
                 [
                     (HvX64RegisterName::Rip, self.cache.rip),
                     (HvX64RegisterName::Rflags, self.cache.rflags.into()),
-                    (HvX64RegisterName::Rsp, self.cache.gps[x86emu::CpuState::RSP]),
+                    (
+                        HvX64RegisterName::Rsp,
+                        self.cache.gps[x86emu::CpuState::RSP],
+                    ),
                 ],
             )
             .unwrap();

vm/x86/x86defs/src/lib.rs

@@ -127,7 +127,7 @@ impl Default for SegmentRegister {
             base: 0,
             limit: 0,
             selector: 0,
-            attributes: SegmentAttributes(0)
+            attributes: SegmentAttributes(0),
         }
     }
 }

vm/x86/x86emu/src/cpu.rs

@@ -3,8 +3,8 @@
 
 //! Trait for asynchronous callouts from the emulator to the VM.
 
-use std::future::Future;
 use crate::registers::RegisterIndex;
+use std::future::Future;
 use x86defs::{RFlags, SegmentRegister};
 
 /// Trait for asynchronous callouts from the emulator to the VM.

vm/x86/x86emu/src/emulator.rs

@@ -66,29 +66,28 @@ impl EmulatorRegister for u128 {
 }
 
 impl Into<RegisterIndex> for Register {
-  fn into(self) -> RegisterIndex {
-      let size = self.size();
-      let shift = match size {
-          1 => {
-              if self >= Register::SPL || self < Register::AH {
-                 0
-              }
-              else {
-                 8
-              }
-          }
-          2 => 0,
-          4 => 0,
-          8 => 0,
-          _ => panic!("invalid gp register size")
-      };
-      let extended_index = self.full_register().number();
-      RegisterIndex {
-          extended_index,
-          size,
-          shift
-      }
-  }
+    fn into(self) -> RegisterIndex {
+        let size = self.size();
+        let shift = match size {
+            1 => {
+                if self >= Register::SPL || self < Register::AH {
+                    0
+                } else {
+                    8
+                }
+            }
+            2 => 0,
+            4 => 0,
+            8 => 0,
+            _ => panic!("invalid gp register size"),
+        };
+        let extended_index = self.full_register().number();
+        RegisterIndex {
+            extended_index,
+            size,
+            shift,
+        }
+    }
 }
 
 /// An instruction emulator.

vm/x86/x86emu/src/emulator/fast_path.rs

@@ -6,8 +6,8 @@
 use super::instruction;
 use crate::emulator::arith::ArithOp;
 use crate::emulator::arith::OrOp;
-use crate::registers::Bitness;
 use crate::registers::bitness;
+use crate::registers::Bitness;
 use crate::Cpu;
 use iced_x86::OpKind;
 use iced_x86::Register;

vm/x86/x86emu/src/emulator/rep.rs

@@ -140,8 +140,10 @@ impl<'a, T: Cpu> Emulator<'a, T> {
 
     fn rep_again(&mut self, rep_state: &mut RepState) -> bool {
         if rep_state.rep.is_some() {
-            self.cpu
-                .set_gp(rep_state.count_reg.into(), rep_state.requested - rep_state.done);
+            self.cpu.set_gp(
+                rep_state.count_reg.into(),
+                rep_state.requested - rep_state.done,
+            );
         }
         if rep_state.is_done() || rep_state.done == MAX_REP_LOOPS {
             return false;
@@ -280,8 +282,10 @@ impl<'a, T: Cpu> Emulator<'a, T> {
             self.write_memory(Register::ES, di_offset, AlignmentMode::Standard, data)
                 .await?;
 
-            self.cpu.set_gp(rsi.into(), si_offset.wrapping_add(rep.delta));
-            self.cpu.set_gp(rdi.into(), di_offset.wrapping_add(rep.delta));
+            self.cpu
+                .set_gp(rsi.into(), si_offset.wrapping_add(rep.delta));
+            self.cpu
+                .set_gp(rdi.into(), di_offset.wrapping_add(rep.delta));
         }
         rep.check_done()?;
         Ok(())
@@ -325,8 +329,10 @@ impl<'a, T: Cpu> Emulator<'a, T> {
             right = u64::from_le_bytes(data_right);
             rep.update_zero(left == right);
 
-            self.cpu.set_gp(rsi.into(), si_offset.wrapping_add(rep.delta));
-            self.cpu.set_gp(rdi.into(), di_offset.wrapping_add(rep.delta));
+            self.cpu
+                .set_gp(rsi.into(), si_offset.wrapping_add(rep.delta));
+            self.cpu
+                .set_gp(rdi.into(), di_offset.wrapping_add(rep.delta));
         }
 
         rep.check_done()?;
@@ -365,7 +371,8 @@ impl<'a, T: Cpu> Emulator<'a, T> {
             memval = u64::from_le_bytes(data);
             rep.update_zero(memval == rax);
 
-            self.cpu.set_gp(rdi.into(), di_offset.wrapping_add(rep.delta));
+            self.cpu
+                .set_gp(rdi.into(), di_offset.wrapping_add(rep.delta));
         }
 
         rep.check_done()?;

vm/x86/x86emu/src/registers.rs

@@ -13,7 +13,7 @@ pub struct RegisterIndex {
     /// The size of the register
     pub size: usize,
     /// Register shift, only applicable for 8-bit registers
-    pub shift: usize
+    pub shift: usize,
 }
 
 /// The current CPU register state. Some of the fields are updated by the emulator.

vmm_core/virt_support_x86emu/src/emulate.rs

@@ -15,9 +15,9 @@ use thiserror::Error;
 use virt::io::CpuIo;
 use virt::VpHaltReason;
 use vm_topology::processor::VpIndex;
-use x86emu::RegisterIndex;
 use x86defs::Exception;
 use x86defs::{RFlags, SegmentRegister};
+use x86emu::RegisterIndex;
 use zerocopy::AsBytes;
 use zerocopy::FromBytes;
 
@@ -809,23 +809,18 @@ impl<T: EmulatorSupport, U: CpuIo> x86emu::Cpu for EmulatorCpu<'_, T, U> {
         let extended_register = self.support.gp(reg.extended_index);
 
         (match reg.size {
-            1 => {
-                ((extended_register >> reg.shift) as u8).into()
-            }
+            1 => ((extended_register >> reg.shift) as u8).into(),
             2 => (extended_register as u16).into(),
             4 => (extended_register as u32).into(),
             8 => extended_register,
             _ => panic!("invalid gp register size"),
         }) as u64
-
     }
 
     fn gp_sign_extend(&mut self, reg: RegisterIndex) -> i64 {
         let extended_register = self.support.gp(reg.extended_index);
         match reg.size {
-            1 => {
-                ((extended_register << reg.shift) as i8).into()
-            }
+            1 => ((extended_register << reg.shift) as i8).into(),
             2 => (extended_register as i16).into(),
             4 => (extended_register as i32).into(),
             8 => extended_register as i64,
@@ -841,9 +836,7 @@ impl<T: EmulatorSupport, U: CpuIo> x86emu::Cpu for EmulatorCpu<'_, T, U> {
                 let mask = (!0xff) << reg.shift;
                 (register_value & mask) | (((v as u8) as u64) << reg.shift)
             }
-            2 => {
-                (register_value & !0xffff) | (v as u16) as u64
-            }
+            2 => (register_value & !0xffff) | (v as u16) as u64,
             // N.B. setting a 32-bit register zero extends the result to the 64-bit
             //      register. This is different from 16-bit and 8-bit registers.
             4 => (v as u32) as u64,