Move usermode halt logic into backing-specific logic

microsoft · Oct 21, 2024 · a217241 · a217241
1 parent 2e5acb8
commit a217241
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Showing 6 changed files with 33 additions and 29 deletions.
diff --git a/openhcl/virt_mshv_vtl/src/processor/mod.rs b/openhcl/virt_mshv_vtl/src/processor/mod.rs
@@ -207,12 +207,12 @@ mod private {
             stop: &mut StopVp<'_>,
         ) -> impl Future<Output = Result<(), VpHaltReason<UhRunVpError>>>;
 
-        /// Returns true if the VP is ready to run the given VTL, false if it is halted.
+        /// Process any pending APIC work.
         fn poll_apic(
             this: &mut UhProcessor<'_, Self>,
             vtl: Vtl,
             scan_irr: bool,
-        ) -> Result<bool, UhRunVpError>;
+        ) -> Result<(), UhRunVpError>;
 
         /// Requests the VP to exit when an external interrupt is ready to be
         /// delivered.
@@ -235,6 +235,13 @@ mod private {
         /// the target VTL that will become active.
         fn switch_vtl_state(this: &mut UhProcessor<'_, Self>, target_vtl: Vtl);
 
+        /// Returns whether this VP should be put to sleep in usermode, or
+        /// whether it's ready to proceed into the kernel.
+        fn halt_in_usermode(this: &mut UhProcessor<'_, Self>, target_vtl: Vtl) -> bool {
+            let _ = (this, target_vtl);
+            false
+        }
+
         fn inspect_extra(_this: &mut UhProcessor<'_, Self>, _resp: &mut inspect::Response<'_>) {}
     }
 }
@@ -654,15 +661,13 @@ impl<'p, T: Backing> Processor for UhProcessor<'p, T> {
                     self.update_synic(Vtl::Vtl0, true);
                 }
 
-                // TODO CVM GUEST VSM: Split ready into two to track per-vtl
-                let mut ready = false;
                 for vtl in [Vtl::Vtl1, Vtl::Vtl0] {
                     // Process interrupts.
                     if self.hv(vtl).is_some() {
                         self.update_synic(vtl, false);
                     }
 
-                    ready |= T::poll_apic(self, vtl, scan_irr[vtl] || first_scan_irr)
+                    T::poll_apic(self, vtl, scan_irr[vtl] || first_scan_irr)
                         .map_err(VpHaltReason::Hypervisor)?;
                 }
                 first_scan_irr = false;
@@ -675,11 +680,12 @@ impl<'p, T: Backing> Processor for UhProcessor<'p, T> {
                     }
                 }
 
-                if ready {
+                // TODO WHP GUEST VSM: This should be next_vtl
+                if T::halt_in_usermode(self, Vtl::Vtl0) {
+                    break Poll::Pending;
+                } else {
                     return <Result<_, VpHaltReason<_>>>::Ok(()).into();
                 }
-
-                break Poll::Pending;
             })
             .await?;
 

diff --git a/openhcl/virt_mshv_vtl/src/processor/mshv/apic.rs b/openhcl/virt_mshv_vtl/src/processor/mshv/apic.rs
@@ -261,9 +261,9 @@ impl UhApicState {
 
 impl UhProcessor<'_, HypervisorBackedX86> {
     /// Returns true if the VP is ready to run, false if it is halted.
-    pub(super) fn poll_apic(&mut self, vtl: Vtl, scan_irr: bool) -> Result<bool, UhRunVpError> {
+    pub(super) fn poll_apic(&mut self, vtl: Vtl, scan_irr: bool) -> Result<(), UhRunVpError> {
         let Some(lapics) = self.backing.lapics.as_mut() else {
-            return Ok(true);
+            return Ok(());
         };
 
         let lapic = &mut lapics[vtl];
@@ -304,12 +304,7 @@ impl UhProcessor<'_, HypervisorBackedX86> {
             self.handle_sipi(vtl, vector)?;
         }
 
-        let lapic = &self.backing.lapics.as_ref().unwrap()[vtl];
-        if lapic.halted || lapic.startup_suspend {
-            return Ok(false);
-        }
-
-        Ok(true)
+        Ok(())
     }
 
     fn handle_init(&mut self, vtl: Vtl) -> Result<(), UhRunVpError> {

diff --git a/openhcl/virt_mshv_vtl/src/processor/mshv/arm64.rs b/openhcl/virt_mshv_vtl/src/processor/mshv/arm64.rs
@@ -198,8 +198,8 @@ impl BackingPrivate for HypervisorBackedArm64 {
         _this: &mut UhProcessor<'_, Self>,
         _vtl: Vtl,
         _scan_irr: bool,
-    ) -> Result<bool, UhRunVpError> {
-        Ok(true)
+    ) -> Result<(), UhRunVpError> {
+        Ok(())
     }
 
     fn request_extint_readiness(this: &mut UhProcessor<'_, Self>) {

diff --git a/openhcl/virt_mshv_vtl/src/processor/mshv/x64.rs b/openhcl/virt_mshv_vtl/src/processor/mshv/x64.rs
@@ -290,10 +290,19 @@ impl BackingPrivate for HypervisorBackedX86 {
         this: &mut UhProcessor<'_, Self>,
         vtl: Vtl,
         scan_irr: bool,
-    ) -> Result<bool, UhRunVpError> {
+    ) -> Result<(), UhRunVpError> {
         this.poll_apic(vtl, scan_irr)
     }
 
+    fn halt_in_usermode(this: &mut UhProcessor<'_, Self>, target_vtl: Vtl) -> bool {
+        if let Some(lapics) = this.backing.lapics.as_ref() {
+            if lapics[target_vtl].halted || lapics[target_vtl].startup_suspend {
+                return true;
+            }
+        }
+        false
+    }
+
     fn request_extint_readiness(this: &mut UhProcessor<'_, Self>) {
         this.backing
             .next_deliverability_notifications

diff --git a/openhcl/virt_mshv_vtl/src/processor/snp/mod.rs b/openhcl/virt_mshv_vtl/src/processor/snp/mod.rs
@@ -338,7 +338,7 @@ impl BackingPrivate for SnpBacked {
         this: &mut UhProcessor<'_, Self>,
         vtl: Vtl,
         scan_irr: bool,
-    ) -> Result<bool, UhRunVpError> {
+    ) -> Result<(), UhRunVpError> {
         // Check for interrupt requests from the host.
         // TODO SNP GUEST VSM supporting VTL 1 proxy irrs requires kernel changes
         if vtl == Vtl::Vtl0 {
@@ -388,10 +388,7 @@ impl BackingPrivate for SnpBacked {
             }
         }
 
-        // Return ready even if halted. `run_vp` will wait in the kernel when
-        // halted, which is necessary so that we are efficiently notified when
-        // more interrupts arrive.
-        Ok(true)
+        Ok(())
     }
 
     fn request_extint_readiness(_this: &mut UhProcessor<'_, Self>) {

diff --git a/openhcl/virt_mshv_vtl/src/processor/tdx/mod.rs b/openhcl/virt_mshv_vtl/src/processor/tdx/mod.rs
@@ -730,7 +730,7 @@ impl BackingPrivate for TdxBacked {
         this: &mut UhProcessor<'_, Self>,
         _vtl: Vtl,
         scan_irr: bool,
-    ) -> Result<bool, UhRunVpError> {
+    ) -> Result<(), UhRunVpError> {
         if !this.try_poll_apic(scan_irr)? {
             tracing::info!("disabling APIC offload due to auto EOI");
             let page = zerocopy::transmute_mut!(this.runner.tdx_apic_page_mut());
@@ -741,10 +741,7 @@ impl BackingPrivate for TdxBacked {
             this.try_poll_apic(false)?;
         }
 
-        // Return ready even if halted. `run_vp` will wait in the kernel when
-        // halted, which is necessary so that we are efficiently notified when
-        // more interrupts arrive.
-        Ok(true)
+        Ok(())
     }
 
     fn request_extint_readiness(_this: &mut UhProcessor<'_, Self>) {