Add missing Quartus project files

hw/AcqSys.qpf

@@ -0,0 +1,6 @@
+DATE = "14:30:11 October 14, 2014"
+QUARTUS_VERSION = "13.1"
+
+# Revisions
+
+PROJECT_REVISION = "AcqSys"

hw/AcqSys.qsf

@@ -1,30 +1,30 @@
-#============================================================
-# Build by Terasic System Builder
-#============================================================
-
+#============================================================
+# Build by Terasic System Builder
+#============================================================
+
 set_global_assignment -name FAMILY "Cyclone IV GX"
 set_global_assignment -name DEVICE EP4CGX150DF31C7
-set_global_assignment -name TOP_LEVEL_ENTITY "AcqSys"
+set_global_assignment -name TOP_LEVEL_ENTITY "AcqSys"
 set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1
 set_global_assignment -name LAST_QUARTUS_VERSION 14.0
 set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:34:45 OCTOBER 23,2014"
 set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
 set_global_assignment -name DEVICE_FILTER_PIN_COUNT 896
 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
-
-#============================================================
-# CLOCK
-#============================================================
+
+#============================================================
+# CLOCK
+#============================================================
 set_location_assignment PIN_AJ16 -to CLOCK_50
 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50
 set_location_assignment PIN_A15 -to CLOCK2_50
 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK2_50
 set_location_assignment PIN_V11 -to CLOCK3_50
 set_instance_assignment -name IO_STANDARD "2.5 V" -to CLOCK3_50
-
-#============================================================
-# LED (High Active)
-#============================================================
+
+#============================================================
+# LED (High Active)
+#============================================================
 set_location_assignment PIN_T23 -to LEDR[0]
 set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[0]
 set_location_assignment PIN_T24 -to LEDR[1]
@@ -79,10 +79,10 @@ set_location_assignment PIN_AA22 -to LEDG[7]
 set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDG[7]
 set_location_assignment PIN_J25 -to LEDG[8]
 set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDG[8]
-
-#============================================================
-# KEY (Active Low)
-#============================================================
+
+#============================================================
+# KEY (Active Low)
+#============================================================
 set_location_assignment PIN_AA26 -to KEY[0]
 set_instance_assignment -name IO_STANDARD "2.5 V" -to KEY[0]
 set_location_assignment PIN_AE25 -to KEY[1]
@@ -91,10 +91,10 @@ set_location_assignment PIN_AF30 -to KEY[2]
 set_instance_assignment -name IO_STANDARD "2.5 V" -to KEY[2]
 set_location_assignment PIN_AE26 -to KEY[3]
 set_instance_assignment -name IO_STANDARD "2.5 V" -to KEY[3]
-
-#============================================================
-# PCIe
-#============================================================
+
+#============================================================
+# PCIe
+#============================================================
 set_location_assignment PIN_V15 -to PCIE_REFCLK_P
 set_instance_assignment -name IO_STANDARD HCSL -to PCIE_REFCLK_P
 set_location_assignment PIN_C29 -to PCIE_WAKE_N
@@ -109,10 +109,10 @@ set_location_assignment PIN_Y4 -to PCIE_TX_P[1]
 set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_P[1]
 set_location_assignment PIN_AA2 -to PCIE_RX_P[1]
 set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_P[1]
-
-#============================================================
-# GPIO, GPIO connect to GPIO Default
-#============================================================
+
+#============================================================
+# GPIO, GPIO connect to GPIO Default
+#============================================================
 set_location_assignment PIN_G16 -to GPIO[0]
 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[0]
 set_location_assignment PIN_F17 -to GPIO[1]
@@ -185,17 +185,17 @@ set_location_assignment PIN_AG26 -to GPIO[34]
 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[34]
 set_location_assignment PIN_Y21 -to GPIO[35]
 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[35]
-
-#============================================================
-# Fan Control
-#============================================================
+
+#============================================================
+# Fan Control
+#============================================================
 set_location_assignment PIN_AF28 -to FAN_CTRL
 set_instance_assignment -name IO_STANDARD "2.5 V" -to FAN_CTRL
-
-#============================================================
-# End of pin assignments by Terasic System Builder
-#============================================================
-
+
+#============================================================
+# End of pin assignments by Terasic System Builder
+#============================================================
+
 
 set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED
 set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
@@ -222,4 +222,6 @@ set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
 set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
 set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
 set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_40MHZ
+set_global_assignment -name SEARCH_PATH "/opt/bluespec/Bluespec-2014.06.A/lib/Verilog.Quartus"
+set_global_assignment -name SEARCH_PATH "/opt/bluespec/Bluespec-2014.06.A/lib/Verilog"
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top