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s390x support #29

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Feb 23, 2024
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3 changes: 2 additions & 1 deletion README.md
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@
Detect CPU ISA features with single-file

<table>
<tr><td>CPU</td><td>&#9989; x86, x86-64<br/>&#9989; arm, aarch64<br/>&#9989; mips<br/>&#9989; powerpc<br/>&#9989; risc-v</td><td rowspan=3>
<tr><td>CPU</td><td>&#9989; x86, x86-64<br/>&#9989; arm, aarch64<br/>&#9989; mips<br/>&#9989; powerpc<br/>&#9989; s390x<br/>&#9989; risc-v</td><td rowspan=3>

```c
#define RUAPU_IMPLEMENTATION
Expand Down Expand Up @@ -222,6 +222,7 @@ _`fma4` on zen1, ISA in hypervisor, etc._
|aarch64|`neon` `vfpv4` `cpuid` `asimdhp` `asimddp` `asimdfhm` `bf16` `i8mm` `sve` `sve2` `svebf16` `svei8mm` `svef32mm` `sha3` `sha512` `sm3` `sm4`|
|mips|`msa`|
|powerpc|`vsx`|
|s390x|`zvector`|
|loongarch||
|risc-v|`i` `m` `a` `f` `d` `c`|

Expand Down
3 changes: 3 additions & 0 deletions main.c
Original file line number Diff line number Diff line change
Expand Up @@ -75,6 +75,9 @@ int main()
#elif __powerpc__
PRINT_ISA_SUPPORT(vsx)

#elif __s390x__
PRINT_ISA_SUPPORT(zvector)

#elif __riscv
PRINT_ISA_SUPPORT(i)
PRINT_ISA_SUPPORT(m)
Expand Down
8 changes: 7 additions & 1 deletion ruapu.h
Original file line number Diff line number Diff line change
Expand Up @@ -134,7 +134,7 @@ static int ruapu_detect_isa(ruapu_some_inst some_inst)
return g_ruapu_sigill_caught ? 0 : 1;
}

#if defined(__i386__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__) || __s390x__
#define RUAPU_INSTCODE(isa, ...) static void ruapu_some_##isa() { asm volatile(".byte " #__VA_ARGS__ : : : ); }
#elif __aarch64__ || __arm__ || __mips__ || __riscv
#define RUAPU_INSTCODE(isa, ...) static void ruapu_some_##isa() { asm volatile(".word " #__VA_ARGS__ : : : ); }
Expand Down Expand Up @@ -228,6 +228,9 @@ RUAPU_INSTCODE(msa, 0x7900001b) // fmadd.w $w0,$w0,$w0
#elif __powerpc__
RUAPU_INSTCODE(vsx, 0x104210c0) // vaddudm v2,v2,v2

#elif __s390x__
RUAPU_INSTCODE(zvector, 0xe7, 0x00, 0x02, 0x00, 0x00, 0x8f) // vfmasb v0,v0,v0,v0

#elif __riscv
RUAPU_INSTCODE(i, 0x00a50533) // add a0,a0,a0
RUAPU_INSTCODE(m, 0x02a50533) // mul a0,a0,a0
Expand Down Expand Up @@ -304,6 +307,9 @@ RUAPU_ISAENTRY(msa)
#elif __powerpc__
RUAPU_ISAENTRY(vsx)

#elif __s390x__
RUAPU_ISAENTRY(zvector)

#elif __riscv
RUAPU_ISAENTRY(i)
RUAPU_ISAENTRY(m)
Expand Down