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tests: benchmarks: Extend testing for clock control
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Test on CPURAD
Enable coverage

Signed-off-by: Bartosz Miller <[email protected]>
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nordic-bami committed Jan 9, 2025
1 parent 852ae66 commit 2fb2a62
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Showing 4 changed files with 89 additions and 16 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -9,3 +9,4 @@ source "${ZEPHYR_BASE}/share/sysbuild/Kconfig"
config REMOTE_BOARD
string
default "$(BOARD)/nrf54h20/cpurad" if SOC_NRF54H20_CPUAPP
default "$(BOARD)/nrf54h20/cpuapp" if SOC_NRF54H20_CPURAD
20 changes: 20 additions & 0 deletions tests/benchmarks/multicore/idle_clock_control/coverage.conf
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
CONFIG_PM=n
CONFIG_PM_S2RAM=n
CONFIG_PM_S2RAM_CUSTOM_MARKING=n
CONFIG_PM_DEVICE=n
CONFIG_PM_DEVICE_RUNTIME=n
CONFIG_POWEROFF=n

CONFIG_GPIO=n

CONFIG_NRFS=y
CONFIG_CLOCK_CONTROL=y
CONFIG_ASSERT=n

CONFIG_PRINTK=y
CONFIG_LOG=n
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y

CONFIG_LOG_BUFFER_SIZE=16384
49 changes: 34 additions & 15 deletions tests/benchmarks/multicore/idle_clock_control/src/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@ struct test_clk_ctx {
size_t clk_specs_size;
};

#if defined(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP)
const struct nrf_clock_spec test_clk_specs_hsfll[] = {
{
.frequency = MHZ(128),
Expand All @@ -37,6 +38,15 @@ const struct nrf_clock_spec test_clk_specs_hsfll[] = {
},
};

static const struct test_clk_ctx hsfll_test_clk_ctx[] = {
{
.clk_dev = DEVICE_DT_GET(DT_NODELABEL(cpuapp_hsfll)),
.clk_specs = test_clk_specs_hsfll,
.clk_specs_size = ARRAY_SIZE(test_clk_specs_hsfll),
},
};
#endif /* CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP */

const struct nrf_clock_spec test_clk_specs_global_hsfll[] = {
{
.frequency = MHZ(320),
Expand Down Expand Up @@ -86,14 +96,6 @@ static const struct test_clk_ctx fll16m_test_clk_ctx[] = {
},
};

static const struct test_clk_ctx hsfll_test_clk_ctx[] = {
{
.clk_dev = DEVICE_DT_GET(DT_NODELABEL(cpuapp_hsfll)),
.clk_specs = test_clk_specs_hsfll,
.clk_specs_size = ARRAY_SIZE(test_clk_specs_hsfll),
},
};

const struct nrf_clock_spec test_clk_specs_lfclk[] = {
{
.frequency = 32768,
Expand All @@ -120,6 +122,7 @@ static const struct test_clk_ctx lfclk_test_clk_ctx[] = {
},
};

#if defined(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP)
const struct nrf_clock_spec test_clk_specs_hfxo[] = {
{
.frequency = MHZ(32),
Expand All @@ -135,6 +138,7 @@ static const struct test_clk_ctx hfxo_test_clk_ctx[] = {
.clk_specs_size = ARRAY_SIZE(test_clk_specs_hfxo),
},
};
#endif /* CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP */

static void test_request_release_clock_spec(const struct device *clk_dev,
const struct nrf_clock_spec *clk_spec)
Expand Down Expand Up @@ -190,6 +194,7 @@ static void test_clock_control_request(const struct test_clk_ctx *clk_contexts,
}
}

#if defined(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP)
static void test_auxpll_control(const struct device *clk_dev)
{
int err;
Expand All @@ -207,20 +212,34 @@ static void test_auxpll_control(const struct device *clk_dev)
__ASSERT_NO_MSG(clk_status == CLOCK_CONTROL_STATUS_OFF);
k_msleep(1000);
}
#endif /* CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP */

void run_tests(void)
{
#if defined(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP)
test_auxpll_control(DEVICE_DT_GET(DT_NODELABEL(canpll)));
test_clock_control_request(hfxo_test_clk_ctx, ARRAY_SIZE(hfxo_test_clk_ctx));
test_clock_control_request(hsfll_test_clk_ctx, ARRAY_SIZE(hsfll_test_clk_ctx));
#endif /* CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP */
test_clock_control_request(global_hsfll_test_clk_ctx,
ARRAY_SIZE(global_hsfll_test_clk_ctx));
test_clock_control_request(fll16m_test_clk_ctx, ARRAY_SIZE(fll16m_test_clk_ctx));
test_clock_control_request(lfclk_test_clk_ctx, ARRAY_SIZE(lfclk_test_clk_ctx));
}

int main(void)
{
LOG_INF("Idle clock_control, %s", CONFIG_BOARD_TARGET);
k_msleep(100);
#if defined(CONFIG_COVERAGE)
printk("Start testing\n");
run_tests();
printk("Testing done\n");
#else
while (1) {
test_auxpll_control(DEVICE_DT_GET(DT_NODELABEL(canpll)));
test_clock_control_request(hfxo_test_clk_ctx, ARRAY_SIZE(hfxo_test_clk_ctx));
test_clock_control_request(hsfll_test_clk_ctx, ARRAY_SIZE(hsfll_test_clk_ctx));
test_clock_control_request(global_hsfll_test_clk_ctx,
ARRAY_SIZE(hsfll_test_clk_ctx));
test_clock_control_request(fll16m_test_clk_ctx, ARRAY_SIZE(fll16m_test_clk_ctx));
test_clock_control_request(lfclk_test_clk_ctx, ARRAY_SIZE(lfclk_test_clk_ctx));
run_tests();
}
#endif /* CONFIG_COVERAGE */

return 0;
}
35 changes: 34 additions & 1 deletion tests/benchmarks/multicore/idle_clock_control/testcase.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,8 @@ common:
- ci_tests_benchmarks_multicore
- ppk_power_measure
tests:
benchmarks.multicore.idle_clock_control:
benchmarks.multicore.idle_clock_control.app:
filter: not CONFIG_COVERAGE
harness: pytest
platform_allow:
- nrf54h20dk/nrf54h20/cpuapp
Expand All @@ -16,3 +17,35 @@ tests:
pytest_root:
- "${CUSTOM_ROOT_TEST_DIR}/test_measure_power_consumption.py::test_measure_and_data_dump_power_consumption_clock_control"
timeout: 90

# note: in this scenario cpuapp is the 'remote'
benchmarks.multicore.idle_clock_control.rad:

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filter: not CONFIG_COVERAGE
harness: pytest
platform_allow:
- nrf54h20dk/nrf54h20/cpurad
integration_platforms:
- nrf54h20dk/nrf54h20/cpurad
extra_args:
- CONFIG_PM_S2RAM=n
- CONFIG_PM_S2RAM_CUSTOM_MARKING=n
- remote_CONFIG_PM_S2RAM=y
- remote_CONFIG_PM_S2RAM_CUSTOM_MARKING=y
- remote_CONFIG_PM_DEVICE=y
- remote_CONFIG_PM_DEVICE_RUNTIME=y
- remote_CONFIG_GPIO=n
- remote_CONFIG_BOOT_BANNER=n
- remote_CONFIG_CLOCK_CONTROL=n
harness_config:
fixture: ppk_power_measure
pytest_root:
- "${CUSTOM_ROOT_TEST_DIR}/test_measure_power_consumption.py::test_measure_and_data_dump_power_consumption_clock_control"
timeout: 90

benchmarks.multicore.idle_clock_control.coverage:
filter: CONFIG_COVERAGE
extra_args:
- CONF_FILE=coverage.conf
- SHIELD=coverage_support
platform_allow:
- nrf54h20dk/nrf54h20/cpuapp

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