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Introduce puts hook for dm serial driver. Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Flynn xu <[email protected]>
Introduce new hypercalls Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Flynn xu <[email protected]>
Update mem map table for xen uboot. xen console and some magic pages needs to be mappe as normal memory. Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Flynn xu <[email protected]>
Support output/input using `xl console [domid]`. Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Flynn xu <[email protected]>
Enable dm serial for xen uboot. Log as below: #xl console 1 MMC: FSL_SDHC: 0 Loading Environment from <NULL>... *** Warning - bad CRC, using default environment Failed (-5) In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 flash target is MMC:0 Fastboot: Normal Normal Boot => Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Flynn xu <[email protected]>
Enable dm usb using the base board otg usb port for fastboot usage Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Ye Li <[email protected]>
Enlarge dom0 mem to 2048M Signed-off-by: Peng Fan <[email protected]>
Remove the fuse operation commands for imx8qm, this will help reduce the u-boot binary size. Test: build and boot ok on imx8qm. Change-Id: I45fd7a86abe5ce7a9a8b9284974190d72b203e1b Signed-off-by: Luo Ji <[email protected]>
Some platforms don't have alias for usb1 device, so when initialize the second controller, its seq is allocated by u-boot automatically. This introduces a problem if the initialization of first controller is failed, for example nothing connect to first controller, then the seq allocated for second controller is 0 not 1. EHCI driver uses the seq as index for USB controller and phy, so it will cause initialization problem for second controller. Fix the issue by adding the usb1 alias for second USB controller. Signed-off-by: Ye Li <[email protected]> Reviewed-by: Peng Fan <[email protected]>
Update the ddrc Qos setting for B1 to align with B0'ssetting. Correct the initial clock for dram_pll. This setting will be overwrite before ddr phy training. Although there is no impact on the dram init, we still need to correct it to eliminate confusion. Signed-off-by: Bai Ping <[email protected]> Reviewed-by: Ye Li <[email protected]> Tested-by: Robby Cai <[email protected]>
Pass "androidboot.keystore=trusty" for trusty backed keymaster service, pass "androidboot.keystore=software" for software keymaster service. Test: boot pass on imx8qm_mek. Change-Id: I9fa38c15a7c10aef09ab29b0e9859b690e3e7a41 Signed-off-by: Ji Luo <[email protected]>
The CONFIG_MMC_ENV_DEV binds with CONFIG_ENV_IS_IN_MMC on mx6sabreauto. When booting from other boot devices like EIMNOR, SPINOR, they need to load kernel from SD, if the configuration is not set, the loading will fail. Signed-off-by: Ye Li <[email protected]>
Fix typo "ONFIG_CMD_FLASH=y" in defconfig, correct it to CONFIG_CMD_FLASH=y Signed-off-by: Ye Li <[email protected]>
To enable SPL+CONTAINER format on android auto with tee, after SPL load container, SPL need to check rpmb keyblob and copy it to secure memory for latter use. Change-Id: I40a791d5b5b1eba6a0170d6853626fb546be4b2c Signed-off-by: faqiang.zhu <[email protected]>
Too many macros are used in fsl_avbkey.c and
make it difficult to maintain.
This patch made some refine by:
1. Move all avb/atx operations to fsl_avb.c.
2. Refine the functions logic.
3. Drop some unsupported conditions/functions.
Test: build and boot on
imx8qm_mek/imx8mq_evk/imx6qp_sabresd/imx7d_pico/imx8m_aiy.
Change-Id: I5c99732acfc47d53cdf188d69223983777e577f4
Signed-off-by: Luo Ji <[email protected]>
u-boot currently needs information from ATF to know if OP-TEE os has been loaded. this information is transmitted via bootargs. this patch enables saving those bootargs into a structure. Signed-off-by: Silvano di Ninno <[email protected]>
If OP-TEE is loaded by ATF, u-boot will add optee device tree node in th edtb so that Linux can loads OP-TEE driver. Signed-off-by: Silvano di Ninno <[email protected]>
When OP-TEE is enabled a share memory is created between Linux and OP-TEE. on QxP with the use of the SC subsystem, this creates a new chunk of memory. Add a new DRAM BANK, so that u-boot is able to capture correctly all the chunks of memory in meminfo. Signed-off-by: Silvano di Ninno <[email protected]>
When OP-TEE is enabled a share memory is created between Linux and OP-TEE. On i.MX 8QM with the use of the SC subsystem, this creates a new chunk of memory. Add a new DRAM BANK, so that u-boot is able to capture correctly all the chunks of memory in meminfo. Signed-off-by: Silvano di Ninno <[email protected]>
When booting SPL from SD/MMC, the codes load and parse container image first, if its authentication is failed, the flow continues to load and parse for FIT image and cause crash in SPL. The correct way should stop the booting if authentication is failed, avoid trying the FIT image since FIT does not support AHAB on 8QM/QXP. Signed-off-by: Ye Li <[email protected]> Reviewed-by: Peng Fan <[email protected]>
for 8qxp_mek and 8qm_mek platforms, container is used instead of FIT, SPL now will load container, not FIT. This modification can minish the size of u-boot image. Change-Id: Id7e3e62bf95db5941264c3370a3e092e9b77a42f Signed-off-by: faqiang.zhu <[email protected]>
Need loadimage before execute mmcboot. Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Ye Li <[email protected]>
… and i.MX8MM devices Add HABv4 documentation for i.MX8M and i.MX8MM targets covering the following topics: - How to sign an securely boot an flash.bin image. - How to extend the root of trust for additional boot images. - Add 2 CSF examples. Reviewed-by: Utkarsh Gupta <[email protected]> Signed-off-by: Breno Lima <[email protected]>
The HABv4 secure boot procedure is now documented in different files:
.
└── habv4
├── csf_examples
│ ├── additional_images
│ │ └── csf_additional_images.txt
│ ├── mx6_mx7
│ │ ├── csf_uboot_fast_authentication.txt
│ │ └── csf_uboot.txt
│ └── mx8m_mx8mm
│ ├── csf_fit.txt
│ └── csf_spl.txt
├── guides
│ ├── mx6_mx7_secure_boot.txt
│ ├── mx8m_mx8mm_secure_boot.pdf
│ └── mx8m_mx8mm_secure_boot.txt
├── introduction_habv4.txt
└── script_examples
└── genIVT.pl
The old documentation secure_boot.txt can be removed.
Reviewed-by: Utkarsh Gupta <[email protected]>
Signed-off-by: Breno Lima <[email protected]>
Add support for new target imx8mq_aiy. Test: build and boot ok on imx8mq_aiy. Change-Id: I7bb8b66e5235a7122073dcfb4cdc7f165036b9a6 Signed-off-by: Ji Luo <[email protected]>
Open configs to enable uuu for imx8mq_aiy. Test: uuu flash ok on imx8mq_aiy. Change-Id: I2c4a1010bf9b32f7cf706e9fa2f75133cf173b35 Signed-off-by: Ji Luo <[email protected]>
Get build warning below because the CONFIG_SERIAL_TAG is not defined. drivers/usb/gadget/f_fastboot.c: In function ‘fastboot_setup’: drivers/usb/gadget/f_fastboot.c:1768:2: warning: ‘serialnr.high’ is used uninitialized in this function [-Wuninitialized] sprintf(serial, "%08x%08x", serialnr.high, serialnr.low); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/usb/gadget/f_fastboot.c:1768:2: warning: ‘serialnr.low’ is used uninitialized in this function [-Wuninitialized] Signed-off-by: Ye Li <[email protected]>
The SPL loads the FIT image FDT part to an address related with the device block length. This length is 512 for SD/MMC and is 1 for other devices like SDP, NOR, NAND, SPI, etc. When signing FIT image, we use fixed address caculated by SD/MMC block length to sign FDT part. Thus, when booting through uuu, this causes mismatch and gets authentication failed. Fix the issue by providing a override function for this FIT buffer address. When secure boot is enabled, adjust the addresses of other devices to be same with SD/MMC. Signed-off-by: Ye Li <[email protected]> Reviewed-by: Peng Fan <[email protected]>
defconfig files for uuu uboot and uboot flashed to board need to be different. because ab slot feature need to be used, defconfig of BSP team won't be used. this patch add for defconfig files for uuu uboot used on imx8. these two files are directly copied from the files below: 1. imx8qm_mek_android_defconfig 2. imx8qxp_mek_android_defconfig 3. imx8mm_evk_android_defconfig 4. imx8mq_evk_android_defconfig they are respectively be pasted as: 1. imx8qm_mek_android_uuu_defconfig 2. imx8qxp_mek_android_uuu_defconfig 3. imx8mm_evk_android_uuu_defconfig 4. imx8mq_evk_android_uuu_defconfig Change-Id: I483593beb99477f1821c529254856d372d274661 Signed-off-by: faqiang.zhu <[email protected]>
uuu doesn't parse SPL+FIT format for mek_8q platforms. this patch delete SPL and FIT related configurations in defconfig file for uuu uboot. Change-Id: If7c352a60a1534b1a5af9f0b661953c9c60191dc Signed-off-by: faqiang.zhu <[email protected]>
Fix coverity issue: CID 43787: Buffer not null terminated (BUFFER_SIZE_WARNING) buffer_size_warning: Calling strncpy with a maximum size argument of 32 bytes on destination array sdev.name of size 32 bytes might leave the destination string unterminated. Test: Coverity scan pass. Change-Id: Ib10e631bab893cb9cd1484082229f806b02849ba Signed-off-by: Luo Ji <[email protected]>
Fix coverity issues as: CID 5899697: Dereference before null check (REVERSE_INULL) CID 3616594: Unchecked return value (CHECKED_RETURN) CID 3616598: Resource leak (RESOURCE_LEAK) CID 3616591: Resource leak (RESOURCE_LEAK) Test: Coverity scan pass. Change-Id: I70abb41c3cd825c6eec43dc7e5baec716ae46680 Signed-off-by: Luo Ji <[email protected]>
Fix coverity issue: CID 2970630: Resource leak (RESOURCE_LEAK) leaked_storage: Variable cdns going out of scope leaks the storage it points to. Memory allocated by devm_kzalloc() won't be freed automatically in u-boot, free the memory manually here. Test: Coverity scan pass. Change-Id: I3000a2385941cef3b8b7e01611cfdc999971a4ca Signed-off-by: Luo Ji <[email protected]>
When switching ARM root clock source from ARM PLL to 24M OSC, found the ARM timer may stop on few chips during stress reboot test. The system counter is still increasing, but ARM timer is stopped. Add a workaround that switch ARM clock source from ARM PLL to Sys PLL2 500M clock instead of 24M OSC. Stress reboot test is passed on all failed chips. Signed-off-by: Ye Li <[email protected]> (cherry picked from commit 7477022)
There are two LPCG HW issues reported in TKT322331. Add workaround for them in u-boot. 1. Back to back LPCG write access must have 4x DSC cycle interval. 2. When DSC clock is gated, LPCG write access may be missed due to the edge detect is not see by DSC. Two writes shall be performed to re-enable the clock if DSC clock is gated Signed-off-by: Ye Li <[email protected]> Reviewed-by: Peng Fan <[email protected]> (cherry picked from commit 96186ca)
The normal ready time of M4 side is less than 1s, so we can use 2s as the timeout of connection. The current value is 10s, which seems a little long if M4 SRTM service does not run. Signed-off-by: Ye Li <[email protected]> Acked-by: Peng Fan <[email protected]> (cherry picked from commit 4792d89)
Update the lpddr4 timing config to align with the ddr tool Signed-off-by: Jacky Bai <[email protected]> Reviewed-by: Ye Li <[email protected]> (cherry picked from commit a1433de)
The mmc_select_mode_and_width() function can be called while the card is in HS200/HS400 mode and can be used to downgrade the card to lower mode, e.g. HS. This is used for example by mmc_boot_part_access_chk() which cannot access the card in HS200/HS400 mode and which is in turn called by saveenv if env is in the MMC. In such case, forcing the card clock to legacy frequency cannot work. Instead, the card must be switched to HS mode first, from which it can then be reprogrammed as needed. However, this procedure needs additional code changes, since the current implementation checks whether the card correctly switched to HS mode in mmc_set_card_speed(). The check only expects that the card will be going to HS mode from lower modes, not from higher modes, hence add a parameter which indicates that the HS200/HS400 to HS downgrade is happening. This makes the code send the switch command first, reconfigure the controller next and finally perform the EXT_CSD readback check. The last two steps cannot be done in reverse order as the card is already in HS mode when the clock are being switched on the controller side. Signed-off-by: Marek Vasut <[email protected]> Cc: Jaehoon Chung <[email protected]> (cherry picked from commit 523f613) Signed-off-by: Haibo Chen <[email protected]>
When using CMD6 to switch eMMC card timing from HS200/HS400 to HS/legacy, do not poll for the completion status using CMD13, but rather wait 50mS. Once the card receives the CMD6 and starts executing it, the bus is in undefined state until both the card finishes executing the command and until the controller switches the bus to matching timing configuration. During this time, it is not possible to transport any commands or data across the bus, which includes the CMD13. Signed-off-by: Marek Vasut <[email protected]> Cc: Jaehoon Chung <[email protected]> (cherry picked from commit 5dbade9) Signed-off-by: Haibo Chen <[email protected]>
After the commit b9a2a0e ("mmc: Add support for downgrading HS200/HS400 to HS mode"), it add a parameter in mmc_set_card_speed() which indicates that the HS200/HS400 to HS downgrade is happening. During the HS400 initialization, first select to HS200, and config the related clock rate, then downgrade to HS mode. So here also need to config the downgrade value to be true, make sure in the function mmc_set_card_speed(), after switch to HS mode, first config the clock rate, then read the EXT_CSD. Otherwise read EXT_CSD in HS mode at wrong clock rate, e.g. 200MHz, may lead to uncertain result. Test on i.MX8QM MEK board, some Micron eMMC will stuck in transfer mode in this case, and USDHC will never get data transfer complete status, cause the uboot hang. Signed-off-by: Haibo Chen <[email protected]> (cherry picked from commit 0ba8e1c)
The boota command boots an Android already written to mmc/emmc. It calls get_boot_device() to figure out where to look for Android; but when a board is booted over serial, get_boot_device() returns an invalid boot mode. Explicitly setting the storage_type will enable boota on a board booted over serial. FB: ucmd setenv storage_type emmc FB: ucmd boota Signed-off-by: Adrian Negreanu <[email protected]>
…esses involving math The sec_in32 preprocessor is defined as follows in include/fsl_sec.h file: When address "a" is calculated using math for ex: addition of base address and an offset, then casting is applied only to the first address which in this example is base address. caam_ccbvid_reg = sec_in32(CONFIG_SYS_FSL_SEC_ADDR + CAAM_CCBVID_OFFSET) resolves to: caam_ccbvid_reg = in_le32((ulong *)(ulong)CONFIG_SYS_FSL_SEC_ADDR + CAAM_CCBVID_OFFSET) instead it should resolve to: caam_ccbvid_reg = in_le32((ulong *)(ulong)(CONFIG_SYS_FSL_SEC_ADDR + CAAM_CCBVID_OFFSET)) Thus add parenthesis around the address "a" so that however the address is calculated, the casting is applied to the final calculated address. Bug introduced by commit 79e90af ("MLK-18044-2: crypto: caam: Fix build warnings pointer casting"). Signed-off-by: Utkarsh Gupta <[email protected]> Reviewed-by: Horia Geanta <[email protected]> Reviewed-by: Ye Li <[email protected]> (cherry picked from commit 5d10d1c)
…vk ddr4 previous setting can NOT meet the USB stream mode performance settting. So use the default QoS setting on the i.MX8MM DDR4. Signed-off-by: Jacky Bai <[email protected]> Reviewed-by: Ye Li <[email protected]> (cherry picked from commit dc9b5e2)
…on board Sync support for container parsing for validation board as on MEK boards. Signed-off-by: Teo Hall <[email protected]>
When booting dual linux with jailhouse, inmate linux will use the 2nd uart, so not restrict access the uart for jailhouse case. The best solution would be using SIP call to ATF, for simplicity, directly modify the RDC register. Signed-off-by: Peng Fan <[email protected]>
Add support for DVT AIY 1G board, distinguish the board type with the board id. TYPE: ID: Micron 1G 0x5 HYNIX 1G 0x3 Micron 3G 0x1 Test: Boot on AIY 1G/3G ddr board. Change-Id: I3c7b6ebe8bc5d4e59917fcc3947e9ebfefc940da Signed-off-by: Ji Luo <[email protected]>
As the M4 use different DDR memory size in normal android/car2 and car image, use different defconfig for car2 to decrease DDR memory reservation. So memory reserved for each M4 core is 8MB in car2 and normal android image. it's 32MB for car image. Change-Id: Idf608f539cd614a154c78e3a1af28eff1da5c1f2 Signed-off-by: Zhang Bo <[email protected]>
Commit 22191ac ("drivers/crypto/fsl: assign job-rings to non-TrustZone") breaks HABv4 encrypted boot support in the following i.MX devices: - i.MX6UL - i.MX7S - i.MX7D - i.MX7ULP For preparing a HABv4 encrypted boot image it's necessary to encapsulated the generated DEK in a blob. The blob generation function takes into consideration the Job Ring TrustZone ownership configuration (JROWN_NS) and can be only decapsulated by the same configuration. The ROM code expects DEK blobs encapsulated by the Secure World environments which commonly have JROWN_NS = 0. As U-Boot is running in Secure World we must have JROWN_NS=0 so the blobs generated by dek_blob tool can be decapsulated by the ROM code. As NXP BSP does not requires all job-rings assigned to non-Secure world this commit can be safely reverted. This reverts commit 22191ac. Reviewed-by: Silvano Di Ninno <[email protected]> Signed-off-by: Breno Lima <[email protected]> (cherry picked from commit 3eebc76)
Enable fastboot configurations in mx6solo sabresd and sabreauto defconfigs to support UUU. Since the DDR size on mx6solo sabre boards is smaller, also change the fastboot buffer to 256MB. Signed-off-by: Ye Li <[email protected]> Reviewed-by: Peng Fan <[email protected]> (cherry picked from commit c482755)
When booting in low power or dual boot modes the M4 binary is authenticated by the M4 ROM code. Add an option in hab_status command so users can retrieve M4 HAB failure and warning events. => hab_status m4 Secure boot disabled HAB Configuration: 0xf0, HAB State: 0x66 No HAB Events Found! Add command documentation in mx6_mx7_secure_boot.txt guide. As HAB M4 API cannot be called from A7 core the code is parsing the M4 HAB persistent memory region. The HAB persistent memory stores HAB events, public keys and others HAB related information. The HAB persistent memory region addresses and sizes can be found in AN12263 "HABv4 RVT Guidelines and Recommendations". Reviewed-by: Utkarsh Gupta <[email protected]> Reviewed-by: Ye Li <[email protected]> Signed-off-by: Breno Lima <[email protected]> (cherry picked from commit 0efff16)
When building 32-bit targets with CONFIG_SECURE_BOOT and DEBUG enabled
the following warnings are displayed:
arch/arm/mach-imx/hab.c:840:41: warning: format '%lx' expects argument \
of type 'long unsigned int', but argument 3 has type 'uint32_t \
{aka unsigned int}' [-Wformat=]
printf("HAB check target 0x%08x-0x%08lx fail\n",
~~~~^
%08x
ddr_start, ddr_start + bytes);
arch/arm/mach-imx/hab.c:845:45: warning: format '%x' expects argument \
of type 'unsigned int', but argument 3 has type 'ulong \
{aka long unsigned int}' [-Wformat=]
printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
~^
%lx
Fix warnings by providing the correct data type.
Reviewed-by: Ye Li <[email protected]>
Signed-off-by: Breno Lima <[email protected]>
(cherry picked from commit 050beb8)
…F example The csf_additional_images.txt example should match with mx6_mx7_secure_boot.txt guide. Fix addresses provided in csf_additional_images.txt CSF example. Reviewed-by: Ye Li <[email protected]> Signed-off-by: Breno Lima <[email protected]> (cherry picked from commit 17c3af7)
The HABv4 implementation in ROM checks if HAB major version in IVT header is 4.x. The current implementation in hab.c code is only validating HAB v4.0 and HAB v4.1 and may be incompatible with newer HABv4 versions. Modify verify_ivt_header() function to align with HABv4 implementation in ROM code. Signed-off-by: Breno Lima <[email protected]> Reviewed-by: Ye Li <[email protected]> (cherry picked from commit 33f51b4)
The blob command is not working on i.MX7D, i.MX8MQ and i.MX8MM devices. Due to different cache management it's necessary to flush dcache range for destination address so data can be available in memory. Add necessary operations in blob_encap() and blob_decap() functions. Signed-off-by: Breno Lima <[email protected]> Reviewed-by: Ye Li <[email protected]> (cherry picked from commit 639e5c1)
Enable i2c2 and i2c3 for AIY. Change-Id: I984e2e76e7c8929cc62088b6838c81f5dc838568
* Bucks 1-4 will be reconfigured via DVS in the kernel. * Buck 5 is explicitly set to 1.0V * Regulator lock/unlock is added, this ensures that in warm or cold reset the values will be set. Change-Id: I8d8be74bddbbd081030fe1762b9f9c6534c7fb77
* There is an enumeration problem when using superspeed. * This doesn't fix it with all hubs, but can enable fastboot to work on some 3.0 hosts. Change-Id: If4a603126b945bd8f84c3d6e975e1185530eb193
* The default configuration (via resistor stuffing) is DFP (host). This means that on Type-C hosts fastboot won't work. * Set to UFP to ensure fastboot works properly. Change-Id: I2b63d95e08df70da43dee1f8f7bb59d1863943f4
Reserve 32M memory for GPU on AIY 1G DDR board. Change-Id: I566a4a027982c8d4e41f280162f2f3cd67f1f5cd Signed-off-by: Ji Luo <[email protected]>
initialize potential uninitialized variable with the type of"char*" to be NULL in AVB. That "hashtree_error_mode" in code is manually specified with a known value, the cases listed cover all potential value of "hashtree_error_mode" explicitly do a type cast for memcpy parameters. Change-Id: Ie5d234422a273d6dab75585bd0d8eb81583707ca Signed-off-by: faqiang.zhu <[email protected]>
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