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[WIP] Compiler+VM POC #3648

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wants to merge 105 commits into from
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[WIP] Compiler+VM POC #3648

wants to merge 105 commits into from

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SupunS
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@SupunS SupunS commented Oct 28, 2024

Description

POC of compiler + VM, based on the work of #2088 by Bastian.


  • Targeted PR against master branch
  • Linked to Github issue with discussion and accepted design OR link to spec that describes this work
  • Code follows the standards mentioned here
  • Updated relevant documentation
  • Re-reviewed Files changed in the Github PR explorer
  • Added appropriate labels

turbolent and others added 27 commits November 29, 2024 11:55
…tion-printer

[Custom VM] Improve and test instruction printer
…oding

[Compiler+VM PoC] Refactor bytecode encoding
…oding

[Compiler+VM PoC] Refactor instruction encoding/decoding
[Compiler+VM PoC] Allow compiler to generate instructions, retarget VM to use instructions
[Compiler+VM POC] Generate the code for the instructions
[Compiler+VM POC] Improve the custom instructions set
[Compiler+VM POC] Document effects of instructions on value stack and control stack
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SupunS commented Jan 22, 2025

Closing the PR since this branch is now stale. Active development was moved to branch feature/compiler

@SupunS SupunS closed this Jan 22, 2025
@turbolent turbolent deleted the supun/vm-cadence-1.0 branch January 22, 2025 23:10
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