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mediatek: add support for JDCloud RE-CP-03
Hardware specification: SoC: MediaTek MT7986A 4x A53 Flash: 128GB eMMC RAM: 1GB DDR4 Ethernet: 4x 1GbE, 1x 2.5GbE (RTL8221B) Switch: MediaTek MT7531AE WiFi: MediaTek MT7976C Button: Reset, Joylink Power: DC 12V 2A Flash instructions: 1. Download and flash the vendor migration firmware via webUI: https://firmware.download.immortalwrt.eu.org/cnsztl/mediatek/filogic/openwrt-mediatek-mt7986-jdcloud_re-cp-03-vendor-migration.bin (Default address is 192.168.68.1, user root, no password) 2. After device has booted up, write new GPT table: dd if=openwrt-mediatek-filogic-jdcloud_re-cp-03-gpt.bin of=/dev/mmcblk0 bs=512 seek=0 count=34 conv=fsync 3. Erase and write new BL2: echo 0 > /sys/block/mmcblk0boot0/force_ro dd if=/dev/zero of=/dev/mmcblk0boot0 bs=512 count=8192 conv=fsync dd if=openwrt-mediatek-filogic-jdcloud_re-cp-03-preloader.bin of=/dev/mmcblk0boot0 bs=512 conv=fsync 4. Erase and write new FIP: dd if=/dev/zero of=/dev/mmcblk0 bs=512 seek=13312 count=8192 conv=fsync dd if=openwrt-mediatek-filogic-jdcloud_re-cp-03-bl31-uboot.fip of=/dev/mmcblk0 bs=512 seek=13312 conv=fsync 5. Set static IP on your PC: IP 192.168.1.254/24, GW 192.168.1.1 6. Serve OpenWrt initramfs image using TFTP server. 7. Cut off the power and re-engage, wait for TFTP recovery to complete. 8. After OpenWrt has booted, perform sysupgrade. 9. Additionally, if you want to have eMMC recovery boot feature: (Don't worry! You will always have TFTP recovery boot feature.) dd if=openwrt-mediatek-filogic-jdcloud_re-cp-03-initramfs-recovery.itb of=/dev/mmcblk0p4 bs=512 conv=fsync Signed-off-by: Tianling Shen <[email protected]> (cherry picked from commit c0c3234)
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
/* | ||
* Copyright (C) 2023 Tianling Shen <[email protected]> | ||
*/ | ||
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/dts-v1/; | ||
#include <dt-bindings/gpio/gpio.h> | ||
#include <dt-bindings/input/input.h> | ||
#include <dt-bindings/leds/common.h> | ||
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#include "mt7986a.dtsi" | ||
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/ { | ||
model = "JDCloud RE-CP-03"; | ||
compatible = "jdcloud,re-cp-03", "mediatek,mt7986a"; | ||
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aliases { | ||
led-boot = &red_led; | ||
led-failsafe = &red_led; | ||
led-running = &green_led; | ||
led-upgrade = &green_led; | ||
serial0 = &uart0; | ||
}; | ||
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chosen { | ||
stdout-path = "serial0:115200n8"; | ||
}; | ||
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memory@40000000 { | ||
reg = <0 0x40000000 0 0x40000000>; | ||
}; | ||
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gpio-keys { | ||
compatible = "gpio-keys"; | ||
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button-joylink { | ||
label = "joylink"; | ||
linux,code = <BTN_0>; | ||
gpios = <&pio 10 GPIO_ACTIVE_LOW>; | ||
}; | ||
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button-reset { | ||
label = "reset"; | ||
linux,code = <KEY_RESTART>; | ||
gpios = <&pio 9 GPIO_ACTIVE_LOW>; | ||
}; | ||
}; | ||
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gpio-leds { | ||
compatible = "gpio-leds"; | ||
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led-0 { | ||
color = <LED_COLOR_ID_BLUE>; | ||
function = LED_FUNCTION_STATUS; | ||
gpios = <&pio 7 GPIO_ACTIVE_HIGH>; | ||
}; | ||
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red_led: led-1 { | ||
color = <LED_COLOR_ID_RED>; | ||
function = LED_FUNCTION_STATUS; | ||
gpios = <&pio 11 GPIO_ACTIVE_HIGH>; | ||
}; | ||
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green_led: led-2 { | ||
color = <LED_COLOR_ID_GREEN>; | ||
function = LED_FUNCTION_STATUS; | ||
gpios = <&pio 12 GPIO_ACTIVE_LOW>; | ||
}; | ||
}; | ||
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reg_1p8v: regulator-1p8v { | ||
compatible = "regulator-fixed"; | ||
regulator-name = "fixed-1.8V"; | ||
regulator-min-microvolt = <1800000>; | ||
regulator-max-microvolt = <1800000>; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
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reg_3p3v: regulator-3p3v { | ||
compatible = "regulator-fixed"; | ||
regulator-name = "fixed-3.3V"; | ||
regulator-min-microvolt = <3300000>; | ||
regulator-max-microvolt = <3300000>; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
}; | ||
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&crypto { | ||
status = "okay"; | ||
}; | ||
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ð { | ||
status = "okay"; | ||
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gmac0: mac@0 { | ||
compatible = "mediatek,eth-mac"; | ||
reg = <0>; | ||
phy-mode = "2500base-x"; | ||
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fixed-link { | ||
speed = <2500>; | ||
full-duplex; | ||
pause; | ||
}; | ||
}; | ||
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gmac1: mac@1 { | ||
compatible = "mediatek,eth-mac"; | ||
reg = <1>; | ||
phy-mode = "2500base-x"; | ||
phy-handle = <&phy6>; | ||
}; | ||
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mdio: mdio-bus { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
}; | ||
}; | ||
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&mdio { | ||
phy6: phy@6 { | ||
compatible = "ethernet-phy-ieee802.3-c45"; | ||
reg = <6>; | ||
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reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>; | ||
reset-assert-us = <10000>; | ||
reset-deassert-us = <50000>; | ||
realtek,aldps-enable; | ||
}; | ||
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switch: switch@1f { | ||
compatible = "mediatek,mt7531"; | ||
reg = <31>; | ||
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
interrupt-parent = <&pio>; | ||
interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; | ||
}; | ||
}; | ||
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&mmc0 { | ||
bus-width = <8>; | ||
cap-mmc-highspeed; | ||
hs400-ds-delay = <0x14014>; | ||
max-frequency = <200000000>; | ||
mmc-hs200-1_8v; | ||
mmc-hs400-1_8v; | ||
no-sd; | ||
no-sdio; | ||
non-removable; | ||
pinctrl-names = "default", "state_uhs"; | ||
pinctrl-0 = <&mmc0_pins_default>; | ||
pinctrl-1 = <&mmc0_pins_uhs>; | ||
vmmc-supply = <®_3p3v>; | ||
vqmmc-supply = <®_1p8v>; | ||
status = "okay"; | ||
}; | ||
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&pio { | ||
mmc0_pins_default: mmc0-pins-default { | ||
mux { | ||
function = "emmc"; | ||
groups = "emmc_51"; | ||
}; | ||
conf-cmd-dat { | ||
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", | ||
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", | ||
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; | ||
input-enable; | ||
drive-strength = <4>; | ||
mediatek,pull-up-adv = <1>; | ||
}; | ||
conf-clk { | ||
pins = "EMMC_CK"; | ||
drive-strength = <6>; | ||
mediatek,pull-down-adv = <2>; | ||
}; | ||
conf-ds { | ||
pins = "EMMC_DSL"; | ||
mediatek,pull-down-adv = <2>; | ||
}; | ||
conf-rst { | ||
pins = "EMMC_RSTB"; | ||
drive-strength = <4>; | ||
mediatek,pull-up-adv = <1>; | ||
}; | ||
}; | ||
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mmc0_pins_uhs: mmc0-uhs-pins { | ||
mux { | ||
function = "emmc"; | ||
groups = "emmc_51"; | ||
}; | ||
conf-cmd-dat { | ||
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", | ||
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", | ||
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; | ||
input-enable; | ||
drive-strength = <4>; | ||
mediatek,pull-up-adv = <1>; | ||
}; | ||
conf-clk { | ||
pins = "EMMC_CK"; | ||
drive-strength = <6>; | ||
mediatek,pull-down-adv = <2>; | ||
}; | ||
conf-ds { | ||
pins = "EMMC_DSL"; | ||
mediatek,pull-down-adv = <2>; | ||
}; | ||
conf-rst { | ||
pins = "EMMC_RSTB"; | ||
drive-strength = <4>; | ||
mediatek,pull-up-adv = <1>; | ||
}; | ||
}; | ||
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wf_2g_5g_pins: wf-2g-5g-pins { | ||
mux { | ||
function = "wifi"; | ||
groups = "wf_2g", "wf_5g"; | ||
}; | ||
conf { | ||
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", | ||
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", | ||
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", | ||
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", | ||
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", | ||
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", | ||
"WF1_TOP_CLK", "WF1_TOP_DATA"; | ||
drive-strength = <4>; | ||
}; | ||
}; | ||
}; | ||
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&switch { | ||
ports { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
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port@1 { | ||
reg = <1>; | ||
label = "lan1"; | ||
}; | ||
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port@2 { | ||
reg = <2>; | ||
label = "lan2"; | ||
}; | ||
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port@3 { | ||
reg = <3>; | ||
label = "lan3"; | ||
}; | ||
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port@4 { | ||
reg = <4>; | ||
label = "lan4"; | ||
}; | ||
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port@6 { | ||
reg = <6>; | ||
ethernet = <&gmac0>; | ||
phy-mode = "2500base-x"; | ||
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fixed-link { | ||
speed = <2500>; | ||
full-duplex; | ||
pause; | ||
}; | ||
}; | ||
}; | ||
}; | ||
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&trng { | ||
status = "okay"; | ||
}; | ||
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&uart0 { | ||
status = "okay"; | ||
}; | ||
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&watchdog { | ||
status = "okay"; | ||
}; | ||
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&wifi { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&wf_2g_5g_pins>; | ||
status = "okay"; | ||
}; |
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